Search

Ishwarbhai B. Patel

Examiner (ID: 1775, Phone: (571)272-1933 , Office: P/2847 )

Most Active Art Unit
2847
Art Unit(s)
2827, 2847, 2835, 2841
Total Applications
1757
Issued Applications
1164
Pending Applications
46
Abandoned Applications
568

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16426825 [patent_doc_number] => 20200352023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-05 [patent_title] => PRINTED CIRCUIT BOARD DESIGN FOR HIGH SPEED APPLICATION [patent_app_type] => utility [patent_app_number] => 16/929651 [patent_app_country] => US [patent_app_date] => 2020-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5894 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16929651 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/929651
PRINTED CIRCUIT BOARD DESIGN FOR HIGH SPEED APPLICATION Jul 14, 2020 Abandoned
Array ( [id] => 18766969 [patent_doc_number] => 11817379 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-14 [patent_title] => Substrate comprising an inductor and a capacitor located in an encapsulation layer [patent_app_type] => utility [patent_app_number] => 16/927823 [patent_app_country] => US [patent_app_date] => 2020-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 27 [patent_no_of_words] => 12379 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16927823 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/927823
Substrate comprising an inductor and a capacitor located in an encapsulation layer Jul 12, 2020 Issued
Array ( [id] => 17872894 [patent_doc_number] => 20220295631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => FLEXIBLE PRINTED WIRING BOARD AND BATTERY WIRING MODULE [patent_app_type] => utility [patent_app_number] => 17/625037 [patent_app_country] => US [patent_app_date] => 2020-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9499 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17625037 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/625037
Flexible printed wiring board and battery wiring module Jul 8, 2020 Issued
Array ( [id] => 17835534 [patent_doc_number] => 20220272839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => FLEXIBLE PRINTED WIRING BOARD, BATTERY WIRING MODULE, AND METHOD OF MANUFACTURING FLEXIBLE PRINTED WIRING BOARD [patent_app_type] => utility [patent_app_number] => 17/624630 [patent_app_country] => US [patent_app_date] => 2020-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5866 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17624630 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/624630
FLEXIBLE PRINTED WIRING BOARD, BATTERY WIRING MODULE, AND METHOD OF MANUFACTURING FLEXIBLE PRINTED WIRING BOARD Jul 8, 2020 Abandoned
Array ( [id] => 17339425 [patent_doc_number] => 20220005756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-06 [patent_title] => WIRING STRUCTURE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/919967 [patent_app_country] => US [patent_app_date] => 2020-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12033 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16919967 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/919967
Wiring structure and method for manufacturing the same Jul 1, 2020 Issued
Array ( [id] => 17797609 [patent_doc_number] => 20220256701 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-11 [patent_title] => METAL MEMBER EQUIPPED CIRCUIT BOARD [patent_app_type] => utility [patent_app_number] => 17/597610 [patent_app_country] => US [patent_app_date] => 2020-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8394 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17597610 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/597610
METAL MEMBER EQUIPPED CIRCUIT BOARD Jun 30, 2020 Abandoned
Array ( [id] => 16804954 [patent_doc_number] => 10999928 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-04 [patent_title] => Circuit board [patent_app_type] => utility [patent_app_number] => 16/914844 [patent_app_country] => US [patent_app_date] => 2020-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1816 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16914844 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/914844
Circuit board Jun 28, 2020 Issued
Array ( [id] => 16790873 [patent_doc_number] => 10993329 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-27 [patent_title] => Board joint structure [patent_app_type] => utility [patent_app_number] => 16/910226 [patent_app_country] => US [patent_app_date] => 2020-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 10649 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16910226 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/910226
Board joint structure Jun 23, 2020 Issued
Array ( [id] => 17797607 [patent_doc_number] => 20220256699 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-11 [patent_title] => CIRCUIT BOARD [patent_app_type] => utility [patent_app_number] => 17/621944 [patent_app_country] => US [patent_app_date] => 2020-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7440 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17621944 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/621944
Circuit board Jun 18, 2020 Issued
Array ( [id] => 17575830 [patent_doc_number] => 11324118 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-03 [patent_title] => Circuit board and connector [patent_app_type] => utility [patent_app_number] => 16/903959 [patent_app_country] => US [patent_app_date] => 2020-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2034 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16903959 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/903959
Circuit board and connector Jun 16, 2020 Issued
Array ( [id] => 16618992 [patent_doc_number] => 20210037645 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => COMPOSITE PANEL COMPRISING AN INTEGRATED ELECTRICAL CIRCUIT AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/899950 [patent_app_country] => US [patent_app_date] => 2020-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8169 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16899950 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/899950
Composite panel comprising an integrated electrical circuit and manufacturing method thereof Jun 11, 2020 Issued
Array ( [id] => 17296903 [patent_doc_number] => 20210392742 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-16 [patent_title] => EMBEDDED MICROSTRIP WITH OPEN SLOT FOR HIGH SPEED SIGNAL TRACES [patent_app_type] => utility [patent_app_number] => 16/898503 [patent_app_country] => US [patent_app_date] => 2020-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4660 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16898503 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/898503
EMBEDDED MICROSTRIP WITH OPEN SLOT FOR HIGH SPEED SIGNAL TRACES Jun 10, 2020 Abandoned
Array ( [id] => 16334309 [patent_doc_number] => 20200305275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => SUBSTRATE STRUCTURE WITH HIGH REFLECTANCE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/894882 [patent_app_country] => US [patent_app_date] => 2020-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6970 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16894882 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/894882
Substrate structure with high reflectance and method for manufacturing the same Jun 7, 2020 Issued
Array ( [id] => 17290150 [patent_doc_number] => 11206734 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-12-21 [patent_title] => Electronic device and wiring structure thereof [patent_app_type] => utility [patent_app_number] => 16/896100 [patent_app_country] => US [patent_app_date] => 2020-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 4375 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16896100 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/896100
Electronic device and wiring structure thereof Jun 7, 2020 Issued
Array ( [id] => 16334310 [patent_doc_number] => 20200305276 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => SUBSTRATE STRUCTURE WITH HIGH REFLECTANCE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/894883 [patent_app_country] => US [patent_app_date] => 2020-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6970 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16894883 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/894883
Substrate structure with high reflectance and method for manufacturing the same Jun 7, 2020 Issued
Array ( [id] => 16334306 [patent_doc_number] => 20200305272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-24 [patent_title] => LAMINATED SUBSTRATE [patent_app_type] => utility [patent_app_number] => 16/895444 [patent_app_country] => US [patent_app_date] => 2020-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5201 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16895444 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/895444
Laminated substrate Jun 7, 2020 Issued
Array ( [id] => 17020013 [patent_doc_number] => 11089674 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-10 [patent_title] => Wiring substrate and method for manufacturing wiring substrate [patent_app_type] => utility [patent_app_number] => 16/892800 [patent_app_country] => US [patent_app_date] => 2020-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 10227 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16892800 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/892800
Wiring substrate and method for manufacturing wiring substrate Jun 3, 2020 Issued
Array ( [id] => 16517576 [patent_doc_number] => 20200396835 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-17 [patent_title] => BONDING PAD STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/884323 [patent_app_country] => US [patent_app_date] => 2020-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9495 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16884323 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/884323
Bonding pad structure May 26, 2020 Issued
Array ( [id] => 16489589 [patent_doc_number] => 20200383204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => SIMULTANEOUS AND SELECTIVE WIDE GAP PARTITIONING OF VIA STRUCTURES USING PLATING RESIST [patent_app_type] => utility [patent_app_number] => 16/883671 [patent_app_country] => US [patent_app_date] => 2020-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14649 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16883671 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/883671
Simultaneous and selective wide gap partitioning of via structures using plating resist May 25, 2020 Issued
Array ( [id] => 16835197 [patent_doc_number] => 11011457 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-18 [patent_title] => Wiring substrate [patent_app_type] => utility [patent_app_number] => 16/875072 [patent_app_country] => US [patent_app_date] => 2020-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 12342 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16875072 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/875072
Wiring substrate May 14, 2020 Issued
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