
Ishwarbhai B. Patel
Examiner (ID: 1775, Phone: (571)272-1933 , Office: P/2847 )
| Most Active Art Unit | 2847 |
| Art Unit(s) | 2827, 2847, 2835, 2841 |
| Total Applications | 1757 |
| Issued Applications | 1164 |
| Pending Applications | 46 |
| Abandoned Applications | 568 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4970954
[patent_doc_number] => 20070110956
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-05-17
[patent_title] => 'MULTILAYER CERAMIC SUBSTRATE AND ITS PRODUCTION METHOD'
[patent_app_type] => utility
[patent_app_number] => 11/622795
[patent_app_country] => US
[patent_app_date] => 2007-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5398
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0110/20070110956.pdf
[firstpage_image] =>[orig_patent_app_number] => 11622795
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/622795 | MULTILAYER CERAMIC SUBSTRATE AND ITS PRODUCTION METHOD | Jan 11, 2007 | Abandoned |
Array
(
[id] => 4807603
[patent_doc_number] => 20080171181
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-17
[patent_title] => 'High-current traces on plated molded interconnect device'
[patent_app_type] => utility
[patent_app_number] => 11/652361
[patent_app_country] => US
[patent_app_date] => 2007-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3220
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0171/20080171181.pdf
[firstpage_image] =>[orig_patent_app_number] => 11652361
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/652361 | High-current traces on plated molded interconnect device | Jan 10, 2007 | Abandoned |
Array
(
[id] => 4810023
[patent_doc_number] => 20080190654
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-08-14
[patent_title] => 'Printed Wiring Board'
[patent_app_type] => utility
[patent_app_number] => 11/621273
[patent_app_country] => US
[patent_app_date] => 2007-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3946
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0190/20080190654.pdf
[firstpage_image] =>[orig_patent_app_number] => 11621273
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/621273 | Printed Wiring Board | Jan 8, 2007 | Abandoned |
Array
(
[id] => 5217527
[patent_doc_number] => 20070158838
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-12
[patent_title] => 'Circuit board, method for manufacturing the same, semiconductor device, and method for manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/649870
[patent_app_country] => US
[patent_app_date] => 2007-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6690
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0158/20070158838.pdf
[firstpage_image] =>[orig_patent_app_number] => 11649870
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/649870 | Circuit board, method for manufacturing the same, semiconductor device, and method for manufacturing the same | Jan 4, 2007 | Abandoned |
Array
(
[id] => 5059767
[patent_doc_number] => 20070221403
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-27
[patent_title] => 'SIGNAL TRANSMISSION STRUCTURE, PACKAGE STRUCTURE AND BONDING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 11/620430
[patent_app_country] => US
[patent_app_date] => 2007-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3234
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0221/20070221403.pdf
[firstpage_image] =>[orig_patent_app_number] => 11620430
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/620430 | Signal transmission structure, package structure and bonding method thereof | Jan 4, 2007 | Issued |
Array
(
[id] => 5002172
[patent_doc_number] => 20070199736
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-08-30
[patent_title] => 'SUBSTRATE WITH MULTILAYER PLATED THROUGH HOLE AND METHOD FOR FORMING THE MULTILAYER PLATED THROUGH HOLE'
[patent_app_type] => utility
[patent_app_number] => 11/620031
[patent_app_country] => US
[patent_app_date] => 2007-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 2566
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0199/20070199736.pdf
[firstpage_image] =>[orig_patent_app_number] => 11620031
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/620031 | Substrate with multilayer plated through hole and method for forming the multilayer plated through hole | Jan 3, 2007 | Issued |
Array
(
[id] => 4908
[patent_doc_number] => 07816611
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-10-19
[patent_title] => 'Circuit board'
[patent_app_type] => utility
[patent_app_number] => 11/619860
[patent_app_country] => US
[patent_app_date] => 2007-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 22
[patent_no_of_words] => 4121
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/816/07816611.pdf
[firstpage_image] =>[orig_patent_app_number] => 11619860
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/619860 | Circuit board | Jan 3, 2007 | Issued |
Array
(
[id] => 5157542
[patent_doc_number] => 20070170586
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-26
[patent_title] => 'Printed circuit board for semiconductor package and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/646552
[patent_app_country] => US
[patent_app_date] => 2006-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6694
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0170/20070170586.pdf
[firstpage_image] =>[orig_patent_app_number] => 11646552
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/646552 | Printed circuit board for semiconductor package and method of manufacturing the same | Dec 27, 2006 | Abandoned |
Array
(
[id] => 4461964
[patent_doc_number] => 07880091
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-02-01
[patent_title] => 'Electronic device substrate, electronic device and methods for making same'
[patent_app_type] => utility
[patent_app_number] => 11/645948
[patent_app_country] => US
[patent_app_date] => 2006-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 46
[patent_no_of_words] => 8424
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/880/07880091.pdf
[firstpage_image] =>[orig_patent_app_number] => 11645948
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/645948 | Electronic device substrate, electronic device and methods for making same | Dec 26, 2006 | Issued |
Array
(
[id] => 4875989
[patent_doc_number] => 20080149371
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-06-26
[patent_title] => 'Flexible circuit'
[patent_app_type] => utility
[patent_app_number] => 11/644548
[patent_app_country] => US
[patent_app_date] => 2006-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2896
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0149/20080149371.pdf
[firstpage_image] =>[orig_patent_app_number] => 11644548
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/644548 | Flexible circuit | Dec 21, 2006 | Abandoned |
Array
(
[id] => 5031024
[patent_doc_number] => 20070095563
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-05-03
[patent_title] => 'Circuit board having deformation interrupting section and circuit board forming method'
[patent_app_type] => utility
[patent_app_number] => 11/640656
[patent_app_country] => US
[patent_app_date] => 2006-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6456
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0095/20070095563.pdf
[firstpage_image] =>[orig_patent_app_number] => 11640656
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/640656 | Circuit board having deformation interrupting section and circuit board forming method | Dec 17, 2006 | Abandoned |
Array
(
[id] => 8122063
[patent_doc_number] => 20120085579
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-04-12
[patent_title] => 'ADHESIVE COMPOSITION, CIRCUIT CONNECTING MATERIAL AND CONNECTING STRUCTURE OF CIRCUIT MEMBER'
[patent_app_type] => utility
[patent_app_number] => 12/159323
[patent_app_country] => US
[patent_app_date] => 2006-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 12058
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0085/20120085579.pdf
[firstpage_image] =>[orig_patent_app_number] => 12159323
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/159323 | ADHESIVE COMPOSITION, CIRCUIT CONNECTING MATERIAL AND CONNECTING STRUCTURE OF CIRCUIT MEMBER | Dec 13, 2006 | Abandoned |
Array
(
[id] => 133545
[patent_doc_number] => 07696441
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-04-13
[patent_title] => 'Flexible wired circuit board'
[patent_app_type] => utility
[patent_app_number] => 11/638475
[patent_app_country] => US
[patent_app_date] => 2006-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4451
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 264
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/696/07696441.pdf
[firstpage_image] =>[orig_patent_app_number] => 11638475
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/638475 | Flexible wired circuit board | Dec 13, 2006 | Issued |
Array
(
[id] => 4781953
[patent_doc_number] => 20080135282
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-06-12
[patent_title] => 'PRINTED MULTILAYER CIRCUIT CONTAINING ACTIVE DEVICES AND METHOD OF MANUFATURING'
[patent_app_type] => utility
[patent_app_number] => 11/609069
[patent_app_country] => US
[patent_app_date] => 2006-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2810
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0135/20080135282.pdf
[firstpage_image] =>[orig_patent_app_number] => 11609069
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/609069 | PRINTED MULTILAYER CIRCUIT CONTAINING ACTIVE DEVICES AND METHOD OF MANUFATURING | Dec 10, 2006 | Abandoned |
Array
(
[id] => 341823
[patent_doc_number] => 07501581
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-03-10
[patent_title] => 'Wired circuit board and producing method thereof'
[patent_app_type] => utility
[patent_app_number] => 11/634868
[patent_app_country] => US
[patent_app_date] => 2006-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 5999
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/501/07501581.pdf
[firstpage_image] =>[orig_patent_app_number] => 11634868
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/634868 | Wired circuit board and producing method thereof | Dec 6, 2006 | Issued |
Array
(
[id] => 5233420
[patent_doc_number] => 20070125575
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-06-07
[patent_title] => 'Dielectric lamination structure, manufacturing method of a dielectric lamination structure, and wiring board including a dielectric lamination structure'
[patent_app_type] => utility
[patent_app_number] => 11/634170
[patent_app_country] => US
[patent_app_date] => 2006-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 11960
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0125/20070125575.pdf
[firstpage_image] =>[orig_patent_app_number] => 11634170
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/634170 | Dielectric lamination structure, manufacturing method of a dielectric lamination structure, and wiring board including a dielectric lamination structure | Dec 5, 2006 | Issued |
Array
(
[id] => 5018810
[patent_doc_number] => 20070144775
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-06-28
[patent_title] => 'Substrate inspection method, printed-wiring board, and electronic circuit device'
[patent_app_type] => utility
[patent_app_number] => 11/635407
[patent_app_country] => US
[patent_app_date] => 2006-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2893
[patent_no_of_claims] => 10
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0144/20070144775.pdf
[firstpage_image] =>[orig_patent_app_number] => 11635407
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/635407 | Substrate inspection method, printed-wiring board, and electronic circuit device | Dec 5, 2006 | Abandoned |
Array
(
[id] => 5030334
[patent_doc_number] => 20070094873
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-05-03
[patent_title] => 'SYSTEM FOR MAKING A CONDUCTIVE CIRCUIT ON A SUBSTANTIALLY NON-CONDUCTIVE SUBSTRATE'
[patent_app_type] => utility
[patent_app_number] => 11/566967
[patent_app_country] => US
[patent_app_date] => 2006-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8366
[patent_no_of_claims] => 20
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0094/20070094873.pdf
[firstpage_image] =>[orig_patent_app_number] => 11566967
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/566967 | SYSTEM FOR MAKING A CONDUCTIVE CIRCUIT ON A SUBSTANTIALLY NON-CONDUCTIVE SUBSTRATE | Dec 4, 2006 | Abandoned |
Array
(
[id] => 4984753
[patent_doc_number] => 20070151090
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-05
[patent_title] => 'Ceramic substrate'
[patent_app_type] => utility
[patent_app_number] => 11/607363
[patent_app_country] => US
[patent_app_date] => 2006-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4651
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0151/20070151090.pdf
[firstpage_image] =>[orig_patent_app_number] => 11607363
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/607363 | Ceramic substrate | Nov 30, 2006 | Abandoned |
Array
(
[id] => 4654361
[patent_doc_number] => 20080023221
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-31
[patent_title] => 'VIA STRUCTURE OF PRINTED CIRCUIT BOARD'
[patent_app_type] => utility
[patent_app_number] => 11/565651
[patent_app_country] => US
[patent_app_date] => 2006-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 768
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0023/20080023221.pdf
[firstpage_image] =>[orig_patent_app_number] => 11565651
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/565651 | VIA STRUCTURE OF PRINTED CIRCUIT BOARD | Nov 30, 2006 | Abandoned |