Ishwarbhai B. Patel

Array ( [id] => 440020 [patent_doc_number] => 07259335 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-21 [patent_title] => 'Solder-bearing wafer for use in soldering operations' [patent_app_type] => utility [patent_app_number] => 10/982986 [patent_app_country] => US [patent_app_date] => 2004-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 9052 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/259/07259335.pdf [firstpage_image] =>[orig_patent_app_number] => 10982986 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 935565 [patent_doc_number] => 06974915 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-13 [patent_title] => 'Printed wiring board interposer sub-assembly and method' [patent_app_type] => utility [patent_app_number] => 10/979366 [patent_app_country] => US [patent_app_date] => 2004-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4595 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/974/06974915.pdf [firstpage_image] =>[orig_patent_app_number] => 10979366 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5101722 [patent_doc_number] => 20070184984 [patent_country] => US [patent_kind] => A2 [patent_issue_date] => 2007-08-09 [patent_title] => 'SUPERCONDUCTING WIRE, SUPERCONDUCTING MUTIFILAMENTARY WIRE USING THE SUPERCONDUCTING WIRE, AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 10/553171 [patent_app_country] => US [patent_app_date] => 2005-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6250 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A2/0184/20070184984.pdf [firstpage_image] =>[orig_patent_app_number] => 10553171 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5101722 [patent_doc_number] => 20070184984 [patent_country] => US [patent_kind] => A2 [patent_issue_date] => 2007-08-09 [patent_title] => 'SUPERCONDUCTING WIRE, SUPERCONDUCTING MUTIFILAMENTARY WIRE USING THE SUPERCONDUCTING WIRE, AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 10/553171 [patent_app_country] => US [patent_app_date] => 2005-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6250 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A2/0184/20070184984.pdf [firstpage_image] =>[orig_patent_app_number] => 10553171 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7214497 [patent_doc_number] => 20050253253 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-17 [patent_title] => 'High electrical performance semiconductor package' [patent_app_type] => utility [patent_app_number] => 10/974376 [patent_app_country] => US [patent_app_date] => 2004-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3456 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20050253253.pdf [firstpage_image] =>[orig_patent_app_number] => 10974376 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7083028 [patent_doc_number] => 20050048408 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-03 [patent_title] => 'COMPOSITE LAMINATE CIRCUIT STRUCTURE' [patent_app_type] => utility [patent_app_number] => 10/904126 [patent_app_country] => US [patent_app_date] => 2004-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6774 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20050048408.pdf [firstpage_image] =>[orig_patent_app_number] => 10904126 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7131986 [patent_doc_number] => 20050178582 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-18 [patent_title] => 'Circuit board with mounting pads for reducing parasitic effect' [patent_app_type] => utility [patent_app_number] => 10/964619 [patent_app_country] => US [patent_app_date] => 2004-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1782 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20050178582.pdf [firstpage_image] =>[orig_patent_app_number] => 10964619 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7009380 [patent_doc_number] => 20050063096 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-24 [patent_title] => 'Integrated lead suspension and method of construction' [patent_app_type] => utility [patent_app_number] => 10/963704 [patent_app_country] => US [patent_app_date] => 2004-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11854 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20050063096.pdf [firstpage_image] =>[orig_patent_app_number] => 10963704 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7081640 [patent_doc_number] => 20050047020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-03 [patent_title] => 'Integrated lead suspension and method of construction' [patent_app_type] => utility [patent_app_number] => 10/964188 [patent_app_country] => US [patent_app_date] => 2004-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11855 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20050047020.pdf [firstpage_image] =>[orig_patent_app_number] => 10964188 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 447237 [patent_doc_number] => 07253363 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-07 [patent_title] => 'Circuit board' [patent_app_type] => utility [patent_app_number] => 10/964284 [patent_app_country] => US [patent_app_date] => 2004-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2947 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/253/07253363.pdf [firstpage_image] =>[orig_patent_app_number] => 10964284 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7167901 [patent_doc_number] => 20050121224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-09 [patent_title] => 'Circuit board having deposit holes' [patent_app_type] => utility [patent_app_number] => 10/959214 [patent_app_country] => US [patent_app_date] => 2004-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1468 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20050121224.pdf [firstpage_image] =>[orig_patent_app_number] => 10959214 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7153168 [patent_doc_number] => 20050082086 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-21 [patent_title] => 'UNBENDING PRINTED CIRCUIT BOARD' [patent_app_type] => utility [patent_app_number] => 10/711795 [patent_app_country] => US [patent_app_date] => 2004-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1537 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0082/20050082086.pdf [firstpage_image] =>[orig_patent_app_number] => 10711795 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7126164 [patent_doc_number] => 20050057908 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-17 [patent_title] => 'Multi-layered interconnect structure using liquid crystalline polymer dielectric' [patent_app_type] => utility [patent_app_number] => 10/959711 [patent_app_country] => US [patent_app_date] => 2004-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 19791 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20050057908.pdf [firstpage_image] =>[orig_patent_app_number] => 10959711 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5138469 [patent_doc_number] => 20070000685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-04 [patent_title] => 'Connection sheet' [patent_app_type] => utility [patent_app_number] => 10/572556 [patent_app_country] => US [patent_app_date] => 2004-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 22418 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0000/20070000685.pdf [firstpage_image] =>[orig_patent_app_number] => 10572556 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 439976 [patent_doc_number] => RE039766 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2007-08-14 [patent_title] => 'Multi-layer circuit board' [patent_app_type] => reissue [patent_app_number] => 10/943256 [patent_app_country] => US [patent_app_date] => 2004-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4242 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 299 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/039/RE039766.pdf [firstpage_image] =>[orig_patent_app_number] => 10943256 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7029933 [patent_doc_number] => 20050029014 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-10 [patent_title] => 'Conductive sheet having conductive layer with improved adhesion and product including the same' [patent_app_type] => utility [patent_app_number] => 10/934389 [patent_app_country] => US [patent_app_date] => 2004-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8863 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20050029014.pdf [firstpage_image] =>[orig_patent_app_number] => 10934389 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7146311 [patent_doc_number] => 20050023035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Information handling system utilizing circuitized substrate' [patent_app_type] => utility [patent_app_number] => 10/933260 [patent_app_country] => US [patent_app_date] => 2004-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3126 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20050023035.pdf [firstpage_image] =>[orig_patent_app_number] => 10933260 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7029932 [patent_doc_number] => 20050029013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-10 [patent_title] => 'Printed wiring board having impedance-matched differential pair signal traces' [patent_app_type] => utility [patent_app_number] => 10/932988 [patent_app_country] => US [patent_app_date] => 2004-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2169 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20050029013.pdf [firstpage_image] =>[orig_patent_app_number] => 10932988 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5900320 [patent_doc_number] => 20060044733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-02 [patent_title] => 'Buried capacitors for multi-layer printed circuit boards' [patent_app_type] => utility [patent_app_number] => 10/932221 [patent_app_country] => US [patent_app_date] => 2004-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2058 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20060044733.pdf [firstpage_image] =>[orig_patent_app_number] => 10932221 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 766893 [patent_doc_number] => 07009115 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-07 [patent_title] => 'Optimization of routing layers and board space requirements for a ball grid array package' [patent_app_type] => utility [patent_app_number] => 10/921134 [patent_app_country] => US [patent_app_date] => 2004-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 50 [patent_figures_cnt] => 56 [patent_no_of_words] => 21345 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/009/07009115.pdf [firstpage_image] =>[orig_patent_app_number] => 10921134 [rel_patent_id] =>[rel_patent_doc_number] =>)