
Ishwarbhai B. Patel
Examiner (ID: 1775, Phone: (571)272-1933 , Office: P/2847 )
| Most Active Art Unit | 2847 |
| Art Unit(s) | 2827, 2847, 2835, 2841 |
| Total Applications | 1757 |
| Issued Applications | 1164 |
| Pending Applications | 46 |
| Abandoned Applications | 568 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6858512
[patent_doc_number] => 20030089520
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-05-15
[patent_title] => 'Wired circuit board'
[patent_app_type] => new
[patent_app_number] => 10/289178
[patent_app_country] => US
[patent_app_date] => 2002-11-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5590
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 42
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0089/20030089520.pdf
[firstpage_image] =>[orig_patent_app_number] => 10289178
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/289178 | Wired circuit board | Nov 6, 2002 | Issued |
Array
(
[id] => 1068979
[patent_doc_number] => 06844505
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-01-18
[patent_title] => 'Reducing noise effects in circuit boards'
[patent_app_type] => utility
[patent_app_number] => 10/287116
[patent_app_country] => US
[patent_app_date] => 2002-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 14
[patent_no_of_words] => 5366
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/844/06844505.pdf
[firstpage_image] =>[orig_patent_app_number] => 10287116
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/287116 | Reducing noise effects in circuit boards | Nov 3, 2002 | Issued |
Array
(
[id] => 1050312
[patent_doc_number] => 06861591
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-03-01
[patent_title] => 'Printed circuit board with wiring pattern formed thereon by screen printing and process for manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 10/288398
[patent_app_country] => US
[patent_app_date] => 2002-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 8814
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/861/06861591.pdf
[firstpage_image] =>[orig_patent_app_number] => 10288398
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/288398 | Printed circuit board with wiring pattern formed thereon by screen printing and process for manufacturing the same | Nov 3, 2002 | Issued |
Array
(
[id] => 755644
[patent_doc_number] => 07019223
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-03-28
[patent_title] => 'Solder resist opening to define a combination pin one indicator and fiducial'
[patent_app_type] => utility
[patent_app_number] => 10/285881
[patent_app_country] => US
[patent_app_date] => 2002-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 16
[patent_no_of_words] => 8469
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/019/07019223.pdf
[firstpage_image] =>[orig_patent_app_number] => 10285881
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/285881 | Solder resist opening to define a combination pin one indicator and fiducial | Oct 30, 2002 | Issued |
Array
(
[id] => 7369248
[patent_doc_number] => 20040079549
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-04-29
[patent_title] => 'Conductive substrate structure'
[patent_app_type] => new
[patent_app_number] => 10/282079
[patent_app_country] => US
[patent_app_date] => 2002-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 1495
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0079/20040079549.pdf
[firstpage_image] =>[orig_patent_app_number] => 10282079
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/282079 | Conductive substrate structure | Oct 28, 2002 | Abandoned |
Array
(
[id] => 1158668
[patent_doc_number] => 06762369
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-07-13
[patent_title] => 'Multilayer ceramic substrate and method for manufacturing the same'
[patent_app_type] => B2
[patent_app_number] => 10/282293
[patent_app_country] => US
[patent_app_date] => 2002-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 4753
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/762/06762369.pdf
[firstpage_image] =>[orig_patent_app_number] => 10282293
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/282293 | Multilayer ceramic substrate and method for manufacturing the same | Oct 27, 2002 | Issued |
Array
(
[id] => 6832307
[patent_doc_number] => 20030159852
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-08-28
[patent_title] => 'Multilayer wiring board, manufacturing method therefor and test apparatus thereof'
[patent_app_type] => new
[patent_app_number] => 10/274125
[patent_app_country] => US
[patent_app_date] => 2002-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4375
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 39
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0159/20030159852.pdf
[firstpage_image] =>[orig_patent_app_number] => 10274125
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/274125 | Multilayer wiring board, manufacturing method therefor and test apparatus thereof | Oct 20, 2002 | Abandoned |
Array
(
[id] => 1065965
[patent_doc_number] => 06846993
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-01-25
[patent_title] => 'Multilayer printed wiring board and its manufacturing method'
[patent_app_type] => utility
[patent_app_number] => 10/267788
[patent_app_country] => US
[patent_app_date] => 2002-10-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4260
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/846/06846993.pdf
[firstpage_image] =>[orig_patent_app_number] => 10267788
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/267788 | Multilayer printed wiring board and its manufacturing method | Oct 9, 2002 | Issued |
Array
(
[id] => 6853745
[patent_doc_number] => 20030127246
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-07-10
[patent_title] => 'Contactor for testing miniaturized devices and components'
[patent_app_type] => new
[patent_app_number] => 10/266866
[patent_app_country] => US
[patent_app_date] => 2002-10-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 47
[patent_figures_cnt] => 47
[patent_no_of_words] => 9425
[patent_no_of_claims] => 37
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0127/20030127246.pdf
[firstpage_image] =>[orig_patent_app_number] => 10266866
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/266866 | Contactor for testing miniaturized devices and components | Oct 8, 2002 | Issued |
Array
(
[id] => 1089847
[patent_doc_number] => 06828512
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-12-07
[patent_title] => 'Apparatus and methods for interconnecting components to via-in-pad interconnects'
[patent_app_type] => B2
[patent_app_number] => 10/267158
[patent_app_country] => US
[patent_app_date] => 2002-10-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 4008
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/828/06828512.pdf
[firstpage_image] =>[orig_patent_app_number] => 10267158
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/267158 | Apparatus and methods for interconnecting components to via-in-pad interconnects | Oct 7, 2002 | Issued |
Array
(
[id] => 7248523
[patent_doc_number] => 20040258500
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-23
[patent_title] => 'Circuit Board Threadplate'
[patent_app_type] => new
[patent_app_number] => 10/264366
[patent_app_country] => US
[patent_app_date] => 2002-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3620
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0258/20040258500.pdf
[firstpage_image] =>[orig_patent_app_number] => 10264366
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/264366 | Circuit board threadplate | Oct 3, 2002 | Issued |
Array
(
[id] => 6811287
[patent_doc_number] => 20030070837
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-04-17
[patent_title] => 'Wiring connection structure and transmitter using the same'
[patent_app_type] => new
[patent_app_number] => 10/263185
[patent_app_country] => US
[patent_app_date] => 2002-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4594
[patent_no_of_claims] => 8
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[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0070/20030070837.pdf
[firstpage_image] =>[orig_patent_app_number] => 10263185
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/263185 | Wiring connection structure and transmitter using the same | Oct 2, 2002 | Issued |
Array
(
[id] => 6837912
[patent_doc_number] => 20030035252
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-02-20
[patent_title] => 'Circuit board capable of preventing electrostatic breakdown and magnetic head using the same'
[patent_app_type] => new
[patent_app_number] => 10/264230
[patent_app_country] => US
[patent_app_date] => 2002-10-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6676
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 6
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0035/20030035252.pdf
[firstpage_image] =>[orig_patent_app_number] => 10264230
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/264230 | Circuit board capable of preventing electrostatic breakdown and magnetic head using the same | Oct 1, 2002 | Issued |
Array
(
[id] => 1157614
[patent_doc_number] => 06765152
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-07-20
[patent_title] => 'Multichip module having chips on two sides'
[patent_app_type] => B2
[patent_app_number] => 10/260086
[patent_app_country] => US
[patent_app_date] => 2002-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 2892
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 197
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/765/06765152.pdf
[firstpage_image] =>[orig_patent_app_number] => 10260086
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/260086 | Multichip module having chips on two sides | Sep 26, 2002 | Issued |
Array
(
[id] => 6782006
[patent_doc_number] => 20030063453
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-04-03
[patent_title] => 'Multilayer wiring circuit board'
[patent_app_type] => new
[patent_app_number] => 10/254565
[patent_app_country] => US
[patent_app_date] => 2002-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0063/20030063453.pdf
[firstpage_image] =>[orig_patent_app_number] => 10254565
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/254565 | Multilayer wiring circuit board | Sep 25, 2002 | Issued |
Array
(
[id] => 1102345
[patent_doc_number] => 06815620
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-11-09
[patent_title] => 'Flexible circuit with electrostatic damage limiting feature'
[patent_app_type] => B2
[patent_app_number] => 10/255507
[patent_app_country] => US
[patent_app_date] => 2002-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 3243
[patent_no_of_claims] => 10
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/815/06815620.pdf
[firstpage_image] =>[orig_patent_app_number] => 10255507
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/255507 | Flexible circuit with electrostatic damage limiting feature | Sep 25, 2002 | Issued |
Array
(
[id] => 6742480
[patent_doc_number] => 20030019663
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-30
[patent_title] => 'Multi-layer wiring substrate and manufacturing method thereof'
[patent_app_type] => new
[patent_app_number] => 10/252058
[patent_app_country] => US
[patent_app_date] => 2002-09-23
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0019/20030019663.pdf
[firstpage_image] =>[orig_patent_app_number] => 10252058
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/252058 | Multi-layer wiring substrate and manufacturing method thereof | Sep 22, 2002 | Abandoned |
Array
(
[id] => 1248944
[patent_doc_number] => 06674016
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-01-06
[patent_title] => 'Electronic component'
[patent_app_type] => B2
[patent_app_number] => 10/246666
[patent_app_country] => US
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/674/06674016.pdf
[firstpage_image] =>[orig_patent_app_number] => 10246666
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/246666 | Electronic component | Sep 18, 2002 | Issued |
Array
(
[id] => 1127797
[patent_doc_number] => 06791034
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-09-14
[patent_title] => 'Circuit board and production method therefor'
[patent_app_type] => B2
[patent_app_number] => 10/238688
[patent_app_country] => US
[patent_app_date] => 2002-09-10
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/791/06791034.pdf
[firstpage_image] =>[orig_patent_app_number] => 10238688
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/238688 | Circuit board and production method therefor | Sep 9, 2002 | Issued |
Array
(
[id] => 6863363
[patent_doc_number] => 20030188889
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-10-09
[patent_title] => 'Printed circuit board and method for producing it'
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[patent_app_country] => US
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0188/20030188889.pdf
[firstpage_image] =>[orig_patent_app_number] => 10235593
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/235593 | Printed circuit board and method for producing it | Sep 3, 2002 | Abandoned |