Search

Ishwarbhai B. Patel

Examiner (ID: 1775, Phone: (571)272-1933 , Office: P/2847 )

Most Active Art Unit
2847
Art Unit(s)
2827, 2847, 2835, 2841
Total Applications
1757
Issued Applications
1164
Pending Applications
46
Abandoned Applications
568

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7639918 [patent_doc_number] => 06395998 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-28 [patent_title] => 'Electronic package having an adhesive retaining cavity' [patent_app_type] => B1 [patent_app_number] => 09/661652 [patent_app_country] => US [patent_app_date] => 2000-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3481 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/395/06395998.pdf [firstpage_image] =>[orig_patent_app_number] => 09661652 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/661652
Electronic package having an adhesive retaining cavity Sep 12, 2000 Issued
09/661253 Superconducting tapes Sep 12, 2000 Abandoned
Array ( [id] => 1597462 [patent_doc_number] => 06492599 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-10 [patent_title] => 'Multilayer wiring board, manufacturing method thereof, and wafer block contact board' [patent_app_type] => B1 [patent_app_number] => 09/659969 [patent_app_country] => US [patent_app_date] => 2000-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 29 [patent_no_of_words] => 11485 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/492/06492599.pdf [firstpage_image] =>[orig_patent_app_number] => 09659969 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/659969
Multilayer wiring board, manufacturing method thereof, and wafer block contact board Sep 11, 2000 Issued
Array ( [id] => 1388886 [patent_doc_number] => 06552277 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-22 [patent_title] => 'Techniques for forming a connection between a pin and a circuit board' [patent_app_type] => B1 [patent_app_number] => 09/658764 [patent_app_country] => US [patent_app_date] => 2000-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6466 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/552/06552277.pdf [firstpage_image] =>[orig_patent_app_number] => 09658764 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/658764
Techniques for forming a connection between a pin and a circuit board Sep 7, 2000 Issued
Array ( [id] => 1505098 [patent_doc_number] => 06465742 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-15 [patent_title] => 'Three dimensional structure and method of manufacturing the same' [patent_app_type] => B1 [patent_app_number] => 09/651030 [patent_app_country] => US [patent_app_date] => 2000-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 17 [patent_no_of_words] => 22767 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/465/06465742.pdf [firstpage_image] =>[orig_patent_app_number] => 09651030 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/651030
Three dimensional structure and method of manufacturing the same Aug 29, 2000 Issued
Array ( [id] => 4384308 [patent_doc_number] => 06303881 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Via connector and method of making same' [patent_app_type] => 1 [patent_app_number] => 9/649169 [patent_app_country] => US [patent_app_date] => 2000-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 4113 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/303/06303881.pdf [firstpage_image] =>[orig_patent_app_number] => 649169 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/649169
Via connector and method of making same Aug 24, 2000 Issued
Array ( [id] => 1182450 [patent_doc_number] => 06737588 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-18 [patent_title] => 'Processes for manufacturing flexible wiring boards and the resulting flexible wiring board' [patent_app_type] => B1 [patent_app_number] => 09/640862 [patent_app_country] => US [patent_app_date] => 2000-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 28 [patent_no_of_words] => 4297 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/737/06737588.pdf [firstpage_image] =>[orig_patent_app_number] => 09640862 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/640862
Processes for manufacturing flexible wiring boards and the resulting flexible wiring board Aug 17, 2000 Issued
Array ( [id] => 4330324 [patent_doc_number] => 06329604 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-11 [patent_title] => 'Multilayer printed circuit board' [patent_app_type] => 1 [patent_app_number] => 9/635175 [patent_app_country] => US [patent_app_date] => 2000-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 5383 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/329/06329604.pdf [firstpage_image] =>[orig_patent_app_number] => 635175 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/635175
Multilayer printed circuit board Aug 8, 2000 Issued
Array ( [id] => 1550731 [patent_doc_number] => 06346679 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-12 [patent_title] => 'Substrate on which ball grid array type electrical part is mounted and method for mounting ball grid array type electrical part on substrate' [patent_app_type] => B1 [patent_app_number] => 09/635478 [patent_app_country] => US [patent_app_date] => 2000-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2750 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/346/06346679.pdf [firstpage_image] =>[orig_patent_app_number] => 09635478 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/635478
Substrate on which ball grid array type electrical part is mounted and method for mounting ball grid array type electrical part on substrate Aug 7, 2000 Issued
Array ( [id] => 7643655 [patent_doc_number] => 06429385 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-06 [patent_title] => 'Non-continuous conductive layer for laminated substrates' [patent_app_type] => B1 [patent_app_number] => 09/634064 [patent_app_country] => US [patent_app_date] => 2000-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 3109 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/429/06429385.pdf [firstpage_image] =>[orig_patent_app_number] => 09634064 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/634064
Non-continuous conductive layer for laminated substrates Aug 7, 2000 Issued
Array ( [id] => 1587475 [patent_doc_number] => 06359235 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Electrical device mounting wiring board and method of producing the same' [patent_app_type] => B1 [patent_app_number] => 09/627846 [patent_app_country] => US [patent_app_date] => 2000-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 47 [patent_no_of_words] => 8560 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/359/06359235.pdf [firstpage_image] =>[orig_patent_app_number] => 09627846 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/627846
Electrical device mounting wiring board and method of producing the same Jul 27, 2000 Issued
09/600370 METHOD OF EASILY IDENTIFYING AN ELECTRODE AMONG ALL THE ELECTRODES 0F ANARRAY AND AN ARRAY OF ELECTRODES FOR IMPLEMENTING THE METHOD Jul 13, 2000 Abandoned
Array ( [id] => 1471252 [patent_doc_number] => 06407343 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-18 [patent_title] => 'Multilayer wiring board' [patent_app_type] => B1 [patent_app_number] => 09/615942 [patent_app_country] => US [patent_app_date] => 2000-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 45 [patent_no_of_words] => 7397 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/407/06407343.pdf [firstpage_image] =>[orig_patent_app_number] => 09615942 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/615942
Multilayer wiring board Jul 12, 2000 Issued
Array ( [id] => 1423237 [patent_doc_number] => 06515233 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-04 [patent_title] => 'Method of producing flex circuit with selectively plated gold' [patent_app_type] => B1 [patent_app_number] => 09/607977 [patent_app_country] => US [patent_app_date] => 2000-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 8020 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/515/06515233.pdf [firstpage_image] =>[orig_patent_app_number] => 09607977 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/607977
Method of producing flex circuit with selectively plated gold Jun 29, 2000 Issued
Array ( [id] => 1486445 [patent_doc_number] => 06365843 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-02 [patent_title] => 'Multilayer printed wiring board' [patent_app_type] => B1 [patent_app_number] => 09/582665 [patent_app_country] => US [patent_app_date] => 2000-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 13 [patent_no_of_words] => 17368 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/365/06365843.pdf [firstpage_image] =>[orig_patent_app_number] => 09582665 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/582665
Multilayer printed wiring board Jun 28, 2000 Issued
09/603840 CONNECTION STRUCTURE Jun 25, 2000 Abandoned
Array ( [id] => 1587472 [patent_doc_number] => 06359234 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Package substrate for mounting semiconductor chip with low impedance and semiconductor device having the same' [patent_app_type] => B1 [patent_app_number] => 09/602064 [patent_app_country] => US [patent_app_date] => 2000-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5430 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/359/06359234.pdf [firstpage_image] =>[orig_patent_app_number] => 09602064 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/602064
Package substrate for mounting semiconductor chip with low impedance and semiconductor device having the same Jun 22, 2000 Issued
Array ( [id] => 1579869 [patent_doc_number] => 06448510 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-10 [patent_title] => 'Substrate for electronic packaging, pin jig fixture' [patent_app_type] => B1 [patent_app_number] => 09/424179 [patent_app_country] => US [patent_app_date] => 2000-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 2151 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/448/06448510.pdf [firstpage_image] =>[orig_patent_app_number] => 09424179 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/424179
Substrate for electronic packaging, pin jig fixture Jun 21, 2000 Issued
Array ( [id] => 4340062 [patent_doc_number] => 06333470 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-25 [patent_title] => 'Assembly for chip(s) with magnetic head(s) and method for making same' [patent_app_type] => 1 [patent_app_number] => 9/529376 [patent_app_country] => US [patent_app_date] => 2000-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2233 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/333/06333470.pdf [firstpage_image] =>[orig_patent_app_number] => 529376 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/529376
Assembly for chip(s) with magnetic head(s) and method for making same Jun 20, 2000 Issued
Array ( [id] => 1562832 [patent_doc_number] => 06362437 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Mounting structure of integrated circuit device having high effect of buffering stress and high reliability of connection by solder, and method of mounting the same' [patent_app_type] => B1 [patent_app_number] => 09/597899 [patent_app_country] => US [patent_app_date] => 2000-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3999 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/362/06362437.pdf [firstpage_image] =>[orig_patent_app_number] => 09597899 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/597899
Mounting structure of integrated circuit device having high effect of buffering stress and high reliability of connection by solder, and method of mounting the same Jun 18, 2000 Issued
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