Search

Ismael Izaguirre

Examiner (ID: 255, Phone: (571)272-4987 , Office: P/3765 )

Most Active Art Unit
3765
Art Unit(s)
2899, 3741, 3732, 2407, 3765, 3742, 3408
Total Applications
3433
Issued Applications
2991
Pending Applications
109
Abandoned Applications
333

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7386496 [patent_doc_number] => 20040021162 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-05 [patent_title] => 'DRAM cell structure with buried surrounding capacitor and process for manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/210031 [patent_app_country] => US [patent_app_date] => 2002-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2813 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0021/20040021162.pdf [firstpage_image] =>[orig_patent_app_number] => 10210031 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/210031
DRAM cell structure with buried surrounding capacitor and process for manufacturing the same Aug 1, 2002 Issued
Array ( [id] => 6384688 [patent_doc_number] => 20020179927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'Thin film transistor and method for manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/200187 [patent_app_country] => US [patent_app_date] => 2002-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1380 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20020179927.pdf [firstpage_image] =>[orig_patent_app_number] => 10200187 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/200187
Thin film transistor and method for manufacturing the same Jul 22, 2002 Abandoned
Array ( [id] => 6385301 [patent_doc_number] => 20020179996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'Semiconductor device having a nitride barrier for preventing formation of structural defects' [patent_app_type] => new [patent_app_number] => 10/193176 [patent_app_country] => US [patent_app_date] => 2002-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3866 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20020179996.pdf [firstpage_image] =>[orig_patent_app_number] => 10193176 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/193176
Semiconductor device having a nitride barrier for preventing formation of structural defects Jul 11, 2002 Abandoned
Array ( [id] => 1239560 [patent_doc_number] => 06686220 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-03 [patent_title] => 'Retrograde well structure for a CMOS imager' [patent_app_type] => B2 [patent_app_number] => 10/180088 [patent_app_country] => US [patent_app_date] => 2002-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 7767 [patent_no_of_claims] => 54 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/686/06686220.pdf [firstpage_image] =>[orig_patent_app_number] => 10180088 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/180088
Retrograde well structure for a CMOS imager Jun 26, 2002 Issued
Array ( [id] => 988138 [patent_doc_number] => 06921693 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-26 [patent_title] => 'Semiconductor device and process for fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/179200 [patent_app_country] => US [patent_app_date] => 2002-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 28 [patent_no_of_words] => 12635 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/921/06921693.pdf [firstpage_image] =>[orig_patent_app_number] => 10179200 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/179200
Semiconductor device and process for fabricating the same Jun 25, 2002 Issued
Array ( [id] => 5787382 [patent_doc_number] => 20020160544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-31 [patent_title] => 'Light emitting device and process for producing the same' [patent_app_type] => new [patent_app_number] => 10/180364 [patent_app_country] => US [patent_app_date] => 2002-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 18914 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20020160544.pdf [firstpage_image] =>[orig_patent_app_number] => 10180364 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/180364
Light emitting device and process for producing the same Jun 25, 2002 Abandoned
Array ( [id] => 6748080 [patent_doc_number] => 20030042600 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-06 [patent_title] => 'Method and apparatus for wafer level testing of semiconductor using sacrificial on die power and ground metalization' [patent_app_type] => new [patent_app_number] => 10/175856 [patent_app_country] => US [patent_app_date] => 2002-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2805 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20030042600.pdf [firstpage_image] =>[orig_patent_app_number] => 10175856 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/175856
Method for wafer level testing of semiconductor using sacrificial on die power and ground metalization Jun 20, 2002 Issued
Array ( [id] => 6170118 [patent_doc_number] => 20020153548 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-24 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/173595 [patent_app_country] => US [patent_app_date] => 2002-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 15792 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20020153548.pdf [firstpage_image] =>[orig_patent_app_number] => 10173595 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/173595
Semiconductor device and method of manufacturing the same Jun 18, 2002 Issued
Array ( [id] => 1248266 [patent_doc_number] => 06673707 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-01-06 [patent_title] => 'Method of forming semiconductor device utilizing die active surfaces for laterally extending die internal and external connections' [patent_app_type] => B2 [patent_app_number] => 10/173935 [patent_app_country] => US [patent_app_date] => 2002-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4019 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/673/06673707.pdf [firstpage_image] =>[orig_patent_app_number] => 10173935 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/173935
Method of forming semiconductor device utilizing die active surfaces for laterally extending die internal and external connections Jun 16, 2002 Issued
Array ( [id] => 6469776 [patent_doc_number] => 20020151169 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-17 [patent_title] => 'Semiconductor chip, semiconductor device, circuit board and electronic equipment and production methods for them' [patent_app_type] => new [patent_app_number] => 10/166703 [patent_app_country] => US [patent_app_date] => 2002-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 7969 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20020151169.pdf [firstpage_image] =>[orig_patent_app_number] => 10166703 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/166703
Semiconductor chip, semiconductor device, circuit board and electronic equipment and production methods for them Jun 11, 2002 Issued
Array ( [id] => 6409159 [patent_doc_number] => 20020182841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'Compliant integrated circuit package' [patent_app_type] => new [patent_app_number] => 10/162822 [patent_app_country] => US [patent_app_date] => 2002-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8447 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0182/20020182841.pdf [firstpage_image] =>[orig_patent_app_number] => 10162822 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/162822
Compliant integrated circuit package Jun 4, 2002 Abandoned
Array ( [id] => 6676952 [patent_doc_number] => 20030227092 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-11 [patent_title] => 'Method of rounding a corner of a contact' [patent_app_type] => new [patent_app_number] => 10/163042 [patent_app_country] => US [patent_app_date] => 2002-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4439 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20030227092.pdf [firstpage_image] =>[orig_patent_app_number] => 10163042 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/163042
Method of rounding a corner of a contact Jun 4, 2002 Abandoned
Array ( [id] => 6434758 [patent_doc_number] => 20020127811 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-12 [patent_title] => 'Trench DRAM cell with vertical device and buried word lines' [patent_app_type] => new [patent_app_number] => 10/152842 [patent_app_country] => US [patent_app_date] => 2002-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4165 [patent_no_of_claims] => 94 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20020127811.pdf [firstpage_image] =>[orig_patent_app_number] => 10152842 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/152842
Trench DRAM cell with vertical device and buried word lines May 22, 2002 Issued
Array ( [id] => 1248146 [patent_doc_number] => 06673645 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-01-06 [patent_title] => 'Method and apparatus for a monolithic integrated mesfet and p-i-n optical receiver' [patent_app_type] => B2 [patent_app_number] => 10/142093 [patent_app_country] => US [patent_app_date] => 2002-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 1943 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/673/06673645.pdf [firstpage_image] =>[orig_patent_app_number] => 10142093 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/142093
Method and apparatus for a monolithic integrated mesfet and p-i-n optical receiver May 7, 2002 Issued
Array ( [id] => 6378707 [patent_doc_number] => 20020119603 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-29 [patent_title] => 'Semiconductor device and method of manufacturing same' [patent_app_type] => new [patent_app_number] => 10/136368 [patent_app_country] => US [patent_app_date] => 2002-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6193 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20020119603.pdf [firstpage_image] =>[orig_patent_app_number] => 10136368 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/136368
Semiconductor device and method of manufacturing same May 1, 2002 Issued
10/119571 Method and system for reducing short channel effects in a memory device by reduction of drain thermal cycling Apr 8, 2002 Abandoned
Array ( [id] => 6548225 [patent_doc_number] => 20020111012 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-15 [patent_title] => 'Partially-overlapped interconnect structure and method of making' [patent_app_type] => new [patent_app_number] => 10/117613 [patent_app_country] => US [patent_app_date] => 2002-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3264 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0111/20020111012.pdf [firstpage_image] =>[orig_patent_app_number] => 10117613 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/117613
Partially-overlapped interconnect structure and method of making Apr 3, 2002 Abandoned
Array ( [id] => 5986315 [patent_doc_number] => 20020098644 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-25 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/106526 [patent_app_country] => US [patent_app_date] => 2002-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8446 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20020098644.pdf [firstpage_image] =>[orig_patent_app_number] => 10106526 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/106526
Semiconductor device and method for manufacturing the same Mar 21, 2002 Abandoned
Array ( [id] => 1180156 [patent_doc_number] => 06744080 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-01 [patent_title] => 'Method of manufacturing a bipolar transistor of double-polysilicon, heterojunction-base type and corresponding transistor' [patent_app_type] => B2 [patent_app_number] => 10/097651 [patent_app_country] => US [patent_app_date] => 2002-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4324 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/744/06744080.pdf [firstpage_image] =>[orig_patent_app_number] => 10097651 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/097651
Method of manufacturing a bipolar transistor of double-polysilicon, heterojunction-base type and corresponding transistor Mar 12, 2002 Issued
Array ( [id] => 1327043 [patent_doc_number] => 06599797 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-29 [patent_title] => 'SOI DRAM without floating body effect' [patent_app_type] => B1 [patent_app_number] => 09/980811 [patent_app_country] => US [patent_app_date] => 2002-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3656 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/599/06599797.pdf [firstpage_image] =>[orig_patent_app_number] => 09980811 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/980811
SOI DRAM without floating body effect Mar 10, 2002 Issued
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