Search

Ismael Izaguirre

Examiner (ID: 255, Phone: (571)272-4987 , Office: P/3765 )

Most Active Art Unit
3765
Art Unit(s)
2899, 3741, 3732, 2407, 3765, 3742, 3408
Total Applications
3433
Issued Applications
2991
Pending Applications
109
Abandoned Applications
333

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1597147 [patent_doc_number] => 06384467 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'Method for forming a cavity capable of accessing deep fuse structures and device containing the same' [patent_app_type] => B1 [patent_app_number] => 09/534651 [patent_app_country] => US [patent_app_date] => 2000-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3600 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/384/06384467.pdf [firstpage_image] =>[orig_patent_app_number] => 09534651 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/534651
Method for forming a cavity capable of accessing deep fuse structures and device containing the same Mar 23, 2000 Issued
Array ( [id] => 4381117 [patent_doc_number] => 06277701 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-21 [patent_title] => 'Circuit and method for a memory cell using reverse base current effect' [patent_app_type] => 1 [patent_app_number] => 9/533122 [patent_app_country] => US [patent_app_date] => 2000-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 5007 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/277/06277701.pdf [firstpage_image] =>[orig_patent_app_number] => 533122 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/533122
Circuit and method for a memory cell using reverse base current effect Mar 22, 2000 Issued
Array ( [id] => 6012370 [patent_doc_number] => 20020100972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-01 [patent_title] => 'Semiconductor device with gold bumps, and method and apparatus of producing the same' [patent_app_type] => new [patent_app_number] => 09/533172 [patent_app_country] => US [patent_app_date] => 2000-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9423 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20020100972.pdf [firstpage_image] =>[orig_patent_app_number] => 09533172 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/533172
Semiconductor device with gold bumps, and method and apparatus of producing the same Mar 21, 2000 Issued
Array ( [id] => 6671925 [patent_doc_number] => 20030057528 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-27 [patent_title] => 'Semiconductor device with copper fuse section' [patent_app_type] => new [patent_app_number] => 09/532892 [patent_app_country] => US [patent_app_date] => 2000-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2287 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20030057528.pdf [firstpage_image] =>[orig_patent_app_number] => 09532892 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/532892
Semiconductor device with copper fuse section Mar 21, 2000 Abandoned
Array ( [id] => 6884916 [patent_doc_number] => 20010039078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-08 [patent_title] => 'Wafer level packaging' [patent_app_type] => new [patent_app_number] => 09/531671 [patent_app_country] => US [patent_app_date] => 2000-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2673 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20010039078.pdf [firstpage_image] =>[orig_patent_app_number] => 09531671 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/531671
Wafer level packaging Mar 19, 2000 Abandoned
09/524262 Use of spacer etch blocking mask to create poly diode used as a one time programmable anti-fuse element Mar 12, 2000 Abandoned
Array ( [id] => 1097328 [patent_doc_number] => 06822271 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-23 [patent_title] => 'Semiconductor photodetector and optical transmitting device' [patent_app_type] => B2 [patent_app_number] => 09/485852 [patent_app_country] => US [patent_app_date] => 2000-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4706 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/822/06822271.pdf [firstpage_image] =>[orig_patent_app_number] => 09485852 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/485852
Semiconductor photodetector and optical transmitting device Feb 16, 2000 Issued
Array ( [id] => 7647094 [patent_doc_number] => 06476424 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-05 [patent_title] => 'Semiconductor memory device' [patent_app_type] => B1 [patent_app_number] => 09/499612 [patent_app_country] => US [patent_app_date] => 2000-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4805 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/476/06476424.pdf [firstpage_image] =>[orig_patent_app_number] => 09499612 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/499612
Semiconductor memory device Feb 6, 2000 Issued
09/497251 Semiconductor device having resistance elements, and process for fabricating the same Feb 2, 2000 Abandoned
Array ( [id] => 4380631 [patent_doc_number] => 06261871 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-17 [patent_title] => 'Method and structure for temperature stabilization in flip chip technology' [patent_app_type] => 1 [patent_app_number] => 9/493591 [patent_app_country] => US [patent_app_date] => 2000-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5175 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/261/06261871.pdf [firstpage_image] =>[orig_patent_app_number] => 493591 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/493591
Method and structure for temperature stabilization in flip chip technology Jan 30, 2000 Issued
Array ( [id] => 1520729 [patent_doc_number] => 06413855 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-07-02 [patent_title] => 'Methods of making interconnections for semiconductor circuits' [patent_app_type] => B2 [patent_app_number] => 09/478952 [patent_app_country] => US [patent_app_date] => 2000-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3241 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/413/06413855.pdf [firstpage_image] =>[orig_patent_app_number] => 09478952 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/478952
Methods of making interconnections for semiconductor circuits Jan 6, 2000 Issued
Array ( [id] => 1005874 [patent_doc_number] => 06906342 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-06-14 [patent_title] => 'Thin film transistor type optical detecting sensor' [patent_app_type] => utility [patent_app_number] => 09/466961 [patent_app_country] => US [patent_app_date] => 1999-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2346 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/906/06906342.pdf [firstpage_image] =>[orig_patent_app_number] => 09466961 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/466961
Thin film transistor type optical detecting sensor Dec 19, 1999 Issued
Array ( [id] => 4285666 [patent_doc_number] => 06210998 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-03 [patent_title] => 'Semiconductor device formed on an insulator and having a damaged portion at the interface between the insulator and the active layer' [patent_app_type] => 1 [patent_app_number] => 9/450657 [patent_app_country] => US [patent_app_date] => 1999-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 2504 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/210/06210998.pdf [firstpage_image] =>[orig_patent_app_number] => 450657 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/450657
Semiconductor device formed on an insulator and having a damaged portion at the interface between the insulator and the active layer Nov 29, 1999 Issued
Array ( [id] => 6290500 [patent_doc_number] => 20020055250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-09 [patent_title] => 'DIELECTRIC STRUCTURE AND METHOD FOR MINIMIZING EROSION DURING CHEMICAL MECHANICAL POLISHING OF METALS' [patent_app_type] => new [patent_app_number] => 09/416483 [patent_app_country] => US [patent_app_date] => 1999-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2252 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20020055250.pdf [firstpage_image] =>[orig_patent_app_number] => 09416483 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/416483
DIELECTRIC STRUCTURE AND METHOD FOR MINIMIZING EROSION DURING CHEMICAL MECHANICAL POLISHING OF METALS Oct 11, 1999 Abandoned
Array ( [id] => 7014561 [patent_doc_number] => 20010051408 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-12-13 [patent_title] => 'METHOD FOR PROVIDING IMPROVED STEP COVERAGE OF DEEP TRENCHES AND USE THEREOF' [patent_app_type] => new [patent_app_number] => 09/412830 [patent_app_country] => US [patent_app_date] => 1999-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2132 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20010051408.pdf [firstpage_image] =>[orig_patent_app_number] => 09412830 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/412830
METHOD FOR PROVIDING IMPROVED STEP COVERAGE OF DEEP TRENCHES AND USE THEREOF Oct 4, 1999 Abandoned
09/402512 SOLID STATE IMAGE SENSOR Oct 4, 1999 Abandoned
Array ( [id] => 7000574 [patent_doc_number] => 20010053575 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-12-20 [patent_title] => 'TRENCH DRAM CELL WITH VERTICAL DEVICE AND BURIED WORD LINES' [patent_app_type] => new [patent_app_number] => 09/405091 [patent_app_country] => US [patent_app_date] => 1999-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4165 [patent_no_of_claims] => 94 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0053/20010053575.pdf [firstpage_image] =>[orig_patent_app_number] => 09405091 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/405091
Trench DRAM cell with vertical device and buried word lines Sep 26, 1999 Issued
Array ( [id] => 4303229 [patent_doc_number] => 06326229 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-04 [patent_title] => 'Process for manufacturing integrated semiconductor devices comprising a chemoresistive gas microsensor' [patent_app_type] => 1 [patent_app_number] => 9/405893 [patent_app_country] => US [patent_app_date] => 1999-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 2792 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/326/06326229.pdf [firstpage_image] =>[orig_patent_app_number] => 405893 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/405893
Process for manufacturing integrated semiconductor devices comprising a chemoresistive gas microsensor Sep 23, 1999 Issued
Array ( [id] => 4324916 [patent_doc_number] => 06329260 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-12-11 [patent_title] => 'Analog-to-digital converter and method of fabrication' [patent_app_type] => 1 [patent_app_number] => 9/394802 [patent_app_country] => US [patent_app_date] => 1999-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 88 [patent_figures_cnt] => 130 [patent_no_of_words] => 31656 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/329/06329260.pdf [firstpage_image] =>[orig_patent_app_number] => 394802 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/394802
Analog-to-digital converter and method of fabrication Sep 9, 1999 Issued
Array ( [id] => 1536046 [patent_doc_number] => 06337239 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-08 [patent_title] => 'Layer configuration with a material layer and a diffusion barrier which blocks diffusing material components and process for producing a diffusion barrier' [patent_app_type] => B1 [patent_app_number] => 09/391720 [patent_app_country] => US [patent_app_date] => 1999-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2870 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/337/06337239.pdf [firstpage_image] =>[orig_patent_app_number] => 09391720 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/391720
Layer configuration with a material layer and a diffusion barrier which blocks diffusing material components and process for producing a diffusion barrier Sep 7, 1999 Issued
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