Search

Ismail A. Muse

Examiner (ID: 4864, Phone: (571)272-1470 , Office: P/2819 )

Most Active Art Unit
2819
Art Unit(s)
2819, 2812, 2829
Total Applications
722
Issued Applications
581
Pending Applications
84
Abandoned Applications
83

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12026925 [patent_doc_number] => 20170317024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/616151 [patent_app_country] => US [patent_app_date] => 2017-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 44 [patent_no_of_words] => 16147 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15616151 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/616151
Semiconductor device with inductively coupled coils Jun 6, 2017 Issued
Array ( [id] => 11955893 [patent_doc_number] => 20170260044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-14 [patent_title] => 'MEMS DEVICES AND PROCESSES' [patent_app_type] => utility [patent_app_number] => 15/608011 [patent_app_country] => US [patent_app_date] => 2017-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 18270 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15608011 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/608011
MEMS devices with membrane having venting flaps hingedly attached to one another May 29, 2017 Issued
Array ( [id] => 11967058 [patent_doc_number] => 20170271211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-21 [patent_title] => 'HYBRID INTEGRATION FABRICATION OF NANOWIRE GATE-ALL-AROUND GE PFET AND POLYGONAL III-V PFET CMOS DEVICE' [patent_app_type] => utility [patent_app_number] => 15/491989 [patent_app_country] => US [patent_app_date] => 2017-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3484 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15491989 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/491989
HYBRID INTEGRATION FABRICATION OF NANOWIRE GATE-ALL-AROUND GE PFET AND POLYGONAL III-V PFET CMOS DEVICE Apr 19, 2017 Abandoned
Array ( [id] => 16812489 [patent_doc_number] => 20210135044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => MICRO-LED ARRAY TRANSFER METHOD, MANUFACTURING METHOD AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/605081 [patent_app_country] => US [patent_app_date] => 2017-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1965 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16605081 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/605081
MICRO-LED ARRAY TRANSFER METHOD, MANUFACTURING METHOD AND DISPLAY DEVICE Apr 18, 2017 Abandoned
Array ( [id] => 14672129 [patent_doc_number] => 10373985 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-06 [patent_title] => Display device using micro light emitting diode [patent_app_type] => utility [patent_app_number] => 15/485545 [patent_app_country] => US [patent_app_date] => 2017-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 16058 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15485545 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/485545
Display device using micro light emitting diode Apr 11, 2017 Issued
Array ( [id] => 11997685 [patent_doc_number] => 20170301840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-19 [patent_title] => 'LAMINATE FILM, METHOD FOR PRODUCING LAMINATE FILM, AND LED-MOUNTED SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 15/485645 [patent_app_country] => US [patent_app_date] => 2017-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 12708 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15485645 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/485645
Laminate film, method for producing laminate film, and LED-mounted substrate Apr 11, 2017 Issued
Array ( [id] => 13499995 [patent_doc_number] => 20180301540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-18 [patent_title] => REPLACEMENT METAL GATE STACK WITH OXYGEN AND NITROGEN SCAVENGING LAYERS [patent_app_type] => utility [patent_app_number] => 15/485727 [patent_app_country] => US [patent_app_date] => 2017-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8751 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15485727 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/485727
Replacement metal gate stack with oxygen and nitrogen scavenging layers Apr 11, 2017 Issued
Array ( [id] => 13500123 [patent_doc_number] => 20180301604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-18 [patent_title] => Packaged UV-LED Device With Anodic Bonded Silica Lens And No UV-Degradable Adhesive [patent_app_type] => utility [patent_app_number] => 15/485644 [patent_app_country] => US [patent_app_date] => 2017-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4031 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15485644 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/485644
Packaged UV-LED device with anodic bonded silica lens and no UV-degradable adhesive Apr 11, 2017 Issued
Array ( [id] => 12779032 [patent_doc_number] => 20180151512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-31 [patent_title] => STACKED SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 15/485530 [patent_app_country] => US [patent_app_date] => 2017-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5673 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15485530 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/485530
Stacked semiconductor device and method of manufacturing the same Apr 11, 2017 Issued
Array ( [id] => 14644505 [patent_doc_number] => 10367003 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-30 [patent_title] => Vertical non-volatile memory device and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 15/485579 [patent_app_country] => US [patent_app_date] => 2017-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 51 [patent_no_of_words] => 11042 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15485579 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/485579
Vertical non-volatile memory device and method for fabricating the same Apr 11, 2017 Issued
Array ( [id] => 16464085 [patent_doc_number] => 10847445 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-24 [patent_title] => Non-symmetric body contacts for field-effect transistors [patent_app_type] => utility [patent_app_number] => 15/475575 [patent_app_country] => US [patent_app_date] => 2017-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 20 [patent_no_of_words] => 9736 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15475575 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/475575
Non-symmetric body contacts for field-effect transistors Mar 30, 2017 Issued
Array ( [id] => 13372253 [patent_doc_number] => 20180237667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-23 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 15/752666 [patent_app_country] => US [patent_app_date] => 2017-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7462 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15752666 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/752666
Semiconductor device and method for manufacturing the same using an adhesive Mar 30, 2017 Issued
Array ( [id] => 13754821 [patent_doc_number] => 10170362 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-01 [patent_title] => Semiconductor memory device with bit line contact structure and method of forming the same [patent_app_type] => utility [patent_app_number] => 15/472295 [patent_app_country] => US [patent_app_date] => 2017-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 2642 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15472295 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/472295
Semiconductor memory device with bit line contact structure and method of forming the same Mar 28, 2017 Issued
Array ( [id] => 15234383 [patent_doc_number] => 10504921 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-10 [patent_title] => Integrated circuit with resurf region biasing under buried insulator layers [patent_app_type] => utility [patent_app_number] => 15/464426 [patent_app_country] => US [patent_app_date] => 2017-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3134 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15464426 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/464426
Integrated circuit with resurf region biasing under buried insulator layers Mar 20, 2017 Issued
Array ( [id] => 13085911 [patent_doc_number] => 10063031 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-28 [patent_title] => Method for manufacturing optical device [patent_app_type] => utility [patent_app_number] => 15/460258 [patent_app_country] => US [patent_app_date] => 2017-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 32 [patent_no_of_words] => 3666 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15460258 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/460258
Method for manufacturing optical device Mar 15, 2017 Issued
Array ( [id] => 12154683 [patent_doc_number] => 20180025947 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-25 [patent_title] => 'METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE' [patent_app_type] => utility [patent_app_number] => 15/460273 [patent_app_country] => US [patent_app_date] => 2017-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 57 [patent_figures_cnt] => 57 [patent_no_of_words] => 10964 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15460273 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/460273
Method of manufacturing integrated circuit device Mar 15, 2017 Issued
Array ( [id] => 13228695 [patent_doc_number] => 10128128 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-13 [patent_title] => Method of manufacturing semiconductor device having air gap between wirings for low dielectric constant [patent_app_type] => utility [patent_app_number] => 15/460557 [patent_app_country] => US [patent_app_date] => 2017-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 9982 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15460557 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/460557
Method of manufacturing semiconductor device having air gap between wirings for low dielectric constant Mar 15, 2017 Issued
Array ( [id] => 12154960 [patent_doc_number] => 20180026225 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-25 [patent_title] => 'DISPLAY DEVICE WITH STRUCTURE FOR PREVENTING ORGANIC MATERIAL OVERFLOW' [patent_app_type] => utility [patent_app_number] => 15/461107 [patent_app_country] => US [patent_app_date] => 2017-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12431 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15461107 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/461107
Display device with structure for preventing organic material overflow Mar 15, 2017 Issued
Array ( [id] => 16372353 [patent_doc_number] => 10804119 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => Method of forming SIP module over film layer [patent_app_type] => utility [patent_app_number] => 15/459997 [patent_app_country] => US [patent_app_date] => 2017-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 26 [patent_no_of_words] => 4258 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15459997 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/459997
Method of forming SIP module over film layer Mar 14, 2017 Issued
Array ( [id] => 13271453 [patent_doc_number] => 10147813 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-04 [patent_title] => Tunneling field effect transistor [patent_app_type] => utility [patent_app_number] => 15/449196 [patent_app_country] => US [patent_app_date] => 2017-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 5156 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15449196 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/449196
Tunneling field effect transistor Mar 2, 2017 Issued
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