Search

Izunna Okeke

Examiner (ID: 3794, Phone: (571)270-3854 , Office: P/2497 )

Most Active Art Unit
2497
Art Unit(s)
2132, 2432, 2497
Total Applications
985
Issued Applications
806
Pending Applications
52
Abandoned Applications
127

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3913079 [patent_doc_number] => 05835929 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-10 [patent_title] => 'Method and apparatus for sub cache line access and storage allowing access to sub cache lines before completion of a line fill' [patent_app_type] => 1 [patent_app_number] => 8/927552 [patent_app_country] => US [patent_app_date] => 1997-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 7438 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/835/05835929.pdf [firstpage_image] =>[orig_patent_app_number] => 927552 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/927552
Method and apparatus for sub cache line access and storage allowing access to sub cache lines before completion of a line fill Sep 5, 1997 Issued
Array ( [id] => 4059371 [patent_doc_number] => 05875450 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-23 [patent_title] => 'Device for processing and storing data received from either a contactless interface or an interface having contacts' [patent_app_type] => 1 [patent_app_number] => 8/795079 [patent_app_country] => US [patent_app_date] => 1997-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2505 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/875/05875450.pdf [firstpage_image] =>[orig_patent_app_number] => 795079 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/795079
Device for processing and storing data received from either a contactless interface or an interface having contacts Feb 4, 1997 Issued
Array ( [id] => 4019969 [patent_doc_number] => 05860126 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-12 [patent_title] => 'Controlling shared memory access ordering in a multi-processing system using an acquire/release consistency model' [patent_app_type] => 1 [patent_app_number] => 8/768775 [patent_app_country] => US [patent_app_date] => 1996-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5814 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/860/05860126.pdf [firstpage_image] =>[orig_patent_app_number] => 768775 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/768775
Controlling shared memory access ordering in a multi-processing system using an acquire/release consistency model Dec 16, 1996 Issued
Array ( [id] => 3954652 [patent_doc_number] => 05873121 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-16 [patent_title] => 'Efficient memory management system for minimizing overhead in storage of data transmitted in a network' [patent_app_type] => 1 [patent_app_number] => 8/753025 [patent_app_country] => US [patent_app_date] => 1996-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 3602 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/873/05873121.pdf [firstpage_image] =>[orig_patent_app_number] => 753025 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/753025
Efficient memory management system for minimizing overhead in storage of data transmitted in a network Nov 18, 1996 Issued
Array ( [id] => 4011652 [patent_doc_number] => 05893161 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-06 [patent_title] => 'Method for allocating ownership of portions of memory in a coherent memory system' [patent_app_type] => 1 [patent_app_number] => 8/747321 [patent_app_country] => US [patent_app_date] => 1996-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2430 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/893/05893161.pdf [firstpage_image] =>[orig_patent_app_number] => 747321 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/747321
Method for allocating ownership of portions of memory in a coherent memory system Nov 11, 1996 Issued
Array ( [id] => 3805654 [patent_doc_number] => 05822758 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-13 [patent_title] => 'Method and system for high performance dynamic and user programmable cache arbitration' [patent_app_type] => 1 [patent_app_number] => 8/709793 [patent_app_country] => US [patent_app_date] => 1996-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4201 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/822/05822758.pdf [firstpage_image] =>[orig_patent_app_number] => 709793 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/709793
Method and system for high performance dynamic and user programmable cache arbitration Sep 8, 1996 Issued
Array ( [id] => 4019728 [patent_doc_number] => 05860110 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-12 [patent_title] => 'Conference maintenance method for cache memories in multi-processor system triggered by a predetermined synchronization point and a predetermined condition' [patent_app_type] => 1 [patent_app_number] => 8/699105 [patent_app_country] => US [patent_app_date] => 1996-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 42 [patent_no_of_words] => 22392 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/860/05860110.pdf [firstpage_image] =>[orig_patent_app_number] => 699105 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/699105
Conference maintenance method for cache memories in multi-processor system triggered by a predetermined synchronization point and a predetermined condition Aug 15, 1996 Issued
Array ( [id] => 3954563 [patent_doc_number] => 05873117 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-16 [patent_title] => 'Method and apparatus for a directory-less memory access protocol in a distributed shared memory computer system' [patent_app_type] => 1 [patent_app_number] => 8/671303 [patent_app_country] => US [patent_app_date] => 1996-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 8181 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/873/05873117.pdf [firstpage_image] =>[orig_patent_app_number] => 671303 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/671303
Method and apparatus for a directory-less memory access protocol in a distributed shared memory computer system Jun 30, 1996 Issued
Array ( [id] => 3781923 [patent_doc_number] => 05845312 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-01 [patent_title] => 'System for accessing dynamic random access memory where the logic/control circuit temporarily stops upon word line switching' [patent_app_type] => 1 [patent_app_number] => 8/673315 [patent_app_country] => US [patent_app_date] => 1996-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4706 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/845/05845312.pdf [firstpage_image] =>[orig_patent_app_number] => 673315 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/673315
System for accessing dynamic random access memory where the logic/control circuit temporarily stops upon word line switching Jun 27, 1996 Issued
Array ( [id] => 3814316 [patent_doc_number] => 05781926 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-14 [patent_title] => 'Method and apparatus for sub cache line access and storage allowing access to sub cache lines before completion of line fill' [patent_app_type] => 1 [patent_app_number] => 8/650733 [patent_app_country] => US [patent_app_date] => 1996-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 7438 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/781/05781926.pdf [firstpage_image] =>[orig_patent_app_number] => 650733 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/650733
Method and apparatus for sub cache line access and storage allowing access to sub cache lines before completion of line fill May 19, 1996 Issued
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