Search

J. Reed Fisher

Examiner (ID: 6827)

Most Active Art Unit
3307
Art Unit(s)
3103, 2854, 3307
Total Applications
1305
Issued Applications
1002
Pending Applications
12
Abandoned Applications
291

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18743603 [patent_doc_number] => 20230352591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/989944 [patent_app_country] => US [patent_app_date] => 2022-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14777 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17989944 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/989944
Semiconductor device Nov 17, 2022 Issued
Array ( [id] => 18999270 [patent_doc_number] => 11916126 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-27 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/989710 [patent_app_country] => US [patent_app_date] => 2022-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4964 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17989710 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/989710
Semiconductor device and manufacturing method thereof Nov 17, 2022 Issued
Array ( [id] => 18952528 [patent_doc_number] => 11895847 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-06 [patent_title] => Magnetoresistive random access memory [patent_app_type] => utility [patent_app_number] => 17/987795 [patent_app_country] => US [patent_app_date] => 2022-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3390 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17987795 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/987795
Magnetoresistive random access memory Nov 14, 2022 Issued
Array ( [id] => 18229218 [patent_doc_number] => 20230068212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => METAL OXIDE SEMICONDUCTOR FIELD-EFFECT TRANSISTOR (MOSFET) DEVICES AND MANUFACTURING METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 18/053777 [patent_app_country] => US [patent_app_date] => 2022-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13865 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18053777 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/053777
Metal oxide semiconductor field-effect transistor (MOSFET) devices and manufacturing methods thereof Nov 8, 2022 Issued
Array ( [id] => 18323975 [patent_doc_number] => 20230122103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-20 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/053234 [patent_app_country] => US [patent_app_date] => 2022-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8388 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18053234 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/053234
Semiconductor device and manufacturing method thereof Nov 6, 2022 Issued
Array ( [id] => 18253704 [patent_doc_number] => 20230080743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => Compact CMOS in wide bandgap semiconductor [patent_app_type] => utility [patent_app_number] => 17/803739 [patent_app_country] => US [patent_app_date] => 2022-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3782 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 326 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17803739 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/803739
Compact CMOS in wide bandgap semiconductor Nov 3, 2022 Pending
Array ( [id] => 18586147 [patent_doc_number] => 20230268412 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/049036 [patent_app_country] => US [patent_app_date] => 2022-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13047 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18049036 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/049036
Semiconductor device and method of fabricating the same Oct 23, 2022 Issued
Array ( [id] => 18181347 [patent_doc_number] => 20230042076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => METHOD AND APPARATUS FOR DETERMINING IMPLANT POSITIONS OF TWO MEDICAL IMPLANT COMPONENTS FORMING A JOINT [patent_app_type] => utility [patent_app_number] => 17/970322 [patent_app_country] => US [patent_app_date] => 2022-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8933 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17970322 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/970322
Method and apparatus for determining implant positions of two medical implant components forming a joint Oct 19, 2022 Issued
Array ( [id] => 18184951 [patent_doc_number] => 20230045681 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/967950 [patent_app_country] => US [patent_app_date] => 2022-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9198 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17967950 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/967950
Semiconductor devices Oct 17, 2022 Issued
Array ( [id] => 20122764 [patent_doc_number] => 20250237795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-24 [patent_title] => Polarizing Plate and Uses Thereof [patent_app_type] => utility [patent_app_number] => 18/697800 [patent_app_country] => US [patent_app_date] => 2022-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4633 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18697800 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/697800
Polarizing Plate and Uses Thereof Oct 16, 2022 Pending
Array ( [id] => 20189783 [patent_doc_number] => 12400907 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-26 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/965927 [patent_app_country] => US [patent_app_date] => 2022-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 2462 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17965927 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/965927
Semiconductor device Oct 13, 2022 Issued
Array ( [id] => 18743541 [patent_doc_number] => 20230352529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => 3D-STACKED SEMICONDUCTOR DEVICE HAVING DIFFERENT CHANNEL LAYER INTERVALS AT LOWER NANOSHEET TRANSISTOR AND UPPER NANOSHEET TRANSISTOR [patent_app_type] => utility [patent_app_number] => 17/965551 [patent_app_country] => US [patent_app_date] => 2022-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10363 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17965551 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/965551
3D-STACKED SEMICONDUCTOR DEVICE HAVING DIFFERENT CHANNEL LAYER INTERVALS AT LOWER NANOSHEET TRANSISTOR AND UPPER NANOSHEET TRANSISTOR Oct 12, 2022 Abandoned
Array ( [id] => 18166126 [patent_doc_number] => 20230032727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => METHODS OF FORMING FINFET DEVICES [patent_app_type] => utility [patent_app_number] => 17/963196 [patent_app_country] => US [patent_app_date] => 2022-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7214 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17963196 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/963196
Methods of forming FinFET devices Oct 10, 2022 Issued
Array ( [id] => 18160045 [patent_doc_number] => 20230026637 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/959670 [patent_app_country] => US [patent_app_date] => 2022-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8593 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17959670 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/959670
Display device Oct 3, 2022 Issued
Array ( [id] => 19086303 [patent_doc_number] => 20240113104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => FORKSHEET TRANSISTOR STRUCTURES WITH GATE CUT SPINE [patent_app_type] => utility [patent_app_number] => 17/936952 [patent_app_country] => US [patent_app_date] => 2022-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12328 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17936952 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/936952
FORKSHEET TRANSISTOR STRUCTURES WITH GATE CUT SPINE Sep 29, 2022 Pending
Array ( [id] => 19086305 [patent_doc_number] => 20240113106 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => ETCH STOP LAYER FOR METAL GATE CUT [patent_app_type] => utility [patent_app_number] => 17/957106 [patent_app_country] => US [patent_app_date] => 2022-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12655 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17957106 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/957106
ETCH STOP LAYER FOR METAL GATE CUT Sep 29, 2022 Pending
Array ( [id] => 19604664 [patent_doc_number] => 20240395544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => DEPOSITION AND TREATMENT OF NANO-GRAPHENE AT LOW TEMPERATURES [patent_app_type] => utility [patent_app_number] => 18/694600 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14446 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18694600 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/694600
DEPOSITION AND TREATMENT OF NANO-GRAPHENE AT LOW TEMPERATURES Sep 28, 2022 Pending
Array ( [id] => 19071345 [patent_doc_number] => 20240105771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => INTEGRATED CIRCUIT STRUCTURES WITH CHANNEL CAP REDUCTION [patent_app_type] => utility [patent_app_number] => 17/955485 [patent_app_country] => US [patent_app_date] => 2022-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17288 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17955485 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/955485
INTEGRATED CIRCUIT STRUCTURES WITH CHANNEL CAP REDUCTION Sep 27, 2022 Pending
Array ( [id] => 19634621 [patent_doc_number] => 20240413070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => VIAS INCLUDING A POROUS ELECTRICALLY CONDUCTIVE MATERIAL AND METHODS FOR FABRICATING THE VIAS [patent_app_type] => utility [patent_app_number] => 18/700432 [patent_app_country] => US [patent_app_date] => 2022-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5691 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18700432 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/700432
VIAS INCLUDING A POROUS ELECTRICALLY CONDUCTIVE MATERIAL AND METHODS FOR FABRICATING THE VIAS Sep 27, 2022 Pending
Array ( [id] => 18145200 [patent_doc_number] => 20230019055 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/954844 [patent_app_country] => US [patent_app_date] => 2022-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9676 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17954844 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/954844
Semiconductor device Sep 27, 2022 Issued
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