
Jack Cooper
Examiner (ID: 2250)
| Most Active Art Unit | 1103 |
| Art Unit(s) | 1108, 1111, 1107, 1103, 1109 |
| Total Applications | 844 |
| Issued Applications | 585 |
| Pending Applications | 2 |
| Abandoned Applications | 257 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 325160
[patent_doc_number] => 07519807
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-04-14
[patent_title] => 'Method and system for implementing a diagnostic or correction boot image over a network connection'
[patent_app_type] => utility
[patent_app_number] => 11/386635
[patent_app_country] => US
[patent_app_date] => 2006-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 3
[patent_no_of_words] => 2749
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 261
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/519/07519807.pdf
[firstpage_image] =>[orig_patent_app_number] => 11386635
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/386635 | Method and system for implementing a diagnostic or correction boot image over a network connection | Mar 21, 2006 | Issued |
Array
(
[id] => 4979046
[patent_doc_number] => 20070220281
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-20
[patent_title] => 'Entry into a low power mode upon application of power at a processing device'
[patent_app_type] => utility
[patent_app_number] => 11/377993
[patent_app_country] => US
[patent_app_date] => 2006-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 3717
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
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[pdf_file] => publications/A1/0220/20070220281.pdf
[firstpage_image] =>[orig_patent_app_number] => 11377993
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/377993 | Entry into a low power mode upon application of power at a processing device | Mar 16, 2006 | Issued |
Array
(
[id] => 4979047
[patent_doc_number] => 20070220282
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-20
[patent_title] => 'System and method for avoiding power shortage due to accidentally pressing power switch during BIOS update'
[patent_app_type] => utility
[patent_app_number] => 11/378111
[patent_app_country] => US
[patent_app_date] => 2006-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1756
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
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[pdf_file] => publications/A1/0220/20070220282.pdf
[firstpage_image] =>[orig_patent_app_number] => 11378111
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/378111 | System and method for avoiding power shortage due to accidentally pressing power switch during BIOS update | Mar 16, 2006 | Abandoned |
Array
(
[id] => 4448955
[patent_doc_number] => 07865707
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-01-04
[patent_title] => 'Gathering configuration settings from a source system to apply to a target system'
[patent_app_type] => utility
[patent_app_number] => 11/378096
[patent_app_country] => US
[patent_app_date] => 2006-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 3840
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 186
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/865/07865707.pdf
[firstpage_image] =>[orig_patent_app_number] => 11378096
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/378096 | Gathering configuration settings from a source system to apply to a target system | Mar 15, 2006 | Issued |
Array
(
[id] => 799060
[patent_doc_number] => 07428654
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-09-23
[patent_title] => 'Data transfer circuit for transferring data between a first circuit block and a second circuit block'
[patent_app_type] => utility
[patent_app_number] => 11/373113
[patent_app_country] => US
[patent_app_date] => 2006-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 9344
[patent_no_of_claims] => 19
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/428/07428654.pdf
[firstpage_image] =>[orig_patent_app_number] => 11373113
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/373113 | Data transfer circuit for transferring data between a first circuit block and a second circuit block | Mar 12, 2006 | Issued |
Array
(
[id] => 615801
[patent_doc_number] => 07149887
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-12-12
[patent_title] => 'System and method for computer hardware identification'
[patent_app_type] => utility
[patent_app_number] => 11/358173
[patent_app_country] => US
[patent_app_date] => 2006-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4089
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[pdf_file] => patents/07/149/07149887.pdf
[firstpage_image] =>[orig_patent_app_number] => 11358173
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/358173 | System and method for computer hardware identification | Feb 20, 2006 | Issued |
Array
(
[id] => 5161599
[patent_doc_number] => 20070174643
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-26
[patent_title] => 'Systems and methods for low power bus operation'
[patent_app_type] => utility
[patent_app_number] => 11/341344
[patent_app_country] => US
[patent_app_date] => 2006-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 9519
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0174/20070174643.pdf
[firstpage_image] =>[orig_patent_app_number] => 11341344
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/341344 | Systems and methods for low power bus operation | Jan 25, 2006 | Issued |
Array
(
[id] => 254483
[patent_doc_number] => 07581126
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-08-25
[patent_title] => 'Information recording apparatus'
[patent_app_type] => utility
[patent_app_number] => 11/337424
[patent_app_country] => US
[patent_app_date] => 2006-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 3825
[patent_no_of_claims] => 3
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[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/581/07581126.pdf
[firstpage_image] =>[orig_patent_app_number] => 11337424
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/337424 | Information recording apparatus | Jan 22, 2006 | Issued |
Array
(
[id] => 5759112
[patent_doc_number] => 20060210057
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-09-21
[patent_title] => 'Supplying power over four pairs of conductors in communication cable'
[patent_app_type] => utility
[patent_app_number] => 11/336971
[patent_app_country] => US
[patent_app_date] => 2006-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4348
[patent_no_of_claims] => 35
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[pdf_file] => publications/A1/0210/20060210057.pdf
[firstpage_image] =>[orig_patent_app_number] => 11336971
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/336971 | Supplying power over four pairs of conductors in communication cable | Jan 22, 2006 | Abandoned |
Array
(
[id] => 5184503
[patent_doc_number] => 20070055857
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-03-08
[patent_title] => 'Method of fast switching control for different operation systems operated in computer'
[patent_app_type] => utility
[patent_app_number] => 11/302241
[patent_app_country] => US
[patent_app_date] => 2005-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2831
[patent_no_of_claims] => 10
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[pdf_file] => publications/A1/0055/20070055857.pdf
[firstpage_image] =>[orig_patent_app_number] => 11302241
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/302241 | Method of fast switching control for different operation systems operated in computer | Dec 13, 2005 | Issued |
Array
(
[id] => 5633512
[patent_doc_number] => 20060149983
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-06
[patent_title] => 'Semiconductor device with clock failure detection circuitry'
[patent_app_type] => utility
[patent_app_number] => 11/302177
[patent_app_country] => US
[patent_app_date] => 2005-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] => publications/A1/0149/20060149983.pdf
[firstpage_image] =>[orig_patent_app_number] => 11302177
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/302177 | Semiconductor device with clock failure detection circuitry | Dec 13, 2005 | Issued |
Array
(
[id] => 7595743
[patent_doc_number] => 07620839
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-11-17
[patent_title] => 'Jitter tolerant delay-locked loop circuit'
[patent_app_type] => utility
[patent_app_number] => 11/302097
[patent_app_country] => US
[patent_app_date] => 2005-12-13
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/620/07620839.pdf
[firstpage_image] =>[orig_patent_app_number] => 11302097
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/302097 | Jitter tolerant delay-locked loop circuit | Dec 12, 2005 | Issued |
Array
(
[id] => 171899
[patent_doc_number] => 07669067
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-02-23
[patent_title] => 'Method and device for setting the clock frequency of a processor'
[patent_app_type] => utility
[patent_app_number] => 11/303055
[patent_app_country] => US
[patent_app_date] => 2005-12-13
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[pdf_file] => patents/07/669/07669067.pdf
[firstpage_image] =>[orig_patent_app_number] => 11303055
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/303055 | Method and device for setting the clock frequency of a processor | Dec 12, 2005 | Issued |
Array
(
[id] => 4549762
[patent_doc_number] => 07925907
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-04-12
[patent_title] => 'Using non-lossless compression to save power'
[patent_app_type] => utility
[patent_app_number] => 11/301850
[patent_app_country] => US
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[pdf_file] => patents/07/925/07925907.pdf
[firstpage_image] =>[orig_patent_app_number] => 11301850
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/301850 | Using non-lossless compression to save power | Dec 11, 2005 | Issued |
Array
(
[id] => 272315
[patent_doc_number] => 07565555
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-07-21
[patent_title] => 'Uninterruptible power supply resource sharing for multiple power sourcing equipment network devices'
[patent_app_type] => utility
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[pdf_file] => patents/07/565/07565555.pdf
[firstpage_image] =>[orig_patent_app_number] => 11286176
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/286176 | Uninterruptible power supply resource sharing for multiple power sourcing equipment network devices | Nov 22, 2005 | Issued |
Array
(
[id] => 5424236
[patent_doc_number] => 20090150692
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-06-11
[patent_title] => 'PORTABLE ULTRASOUND SYSTEM WITH VARIABLE POWER CONSUMPTION'
[patent_app_type] => utility
[patent_app_number] => 11/719789
[patent_app_country] => US
[patent_app_date] => 2005-11-17
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0150/20090150692.pdf
[firstpage_image] =>[orig_patent_app_number] => 11719789
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/719789 | PORTABLE ULTRASOUND SYSTEM WITH VARIABLE POWER CONSUMPTION | Nov 16, 2005 | Abandoned |
Array
(
[id] => 5504138
[patent_doc_number] => 20090164826
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-06-25
[patent_title] => 'Method and device for synchronizing in a multiprocessor system'
[patent_app_type] => utility
[patent_app_number] => 11/666413
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[pdf_file] => publications/A1/0164/20090164826.pdf
[firstpage_image] =>[orig_patent_app_number] => 11666413
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/666413 | Method and device for synchronizing in a multiprocessor system | Oct 24, 2005 | Abandoned |
Array
(
[id] => 192933
[patent_doc_number] => 07644260
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-01-05
[patent_title] => 'File update system and boot management system of mobile communication terminal, method of updating file in mobile communication terminal, and method of booting mobile communication terminal'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/258294 | File update system and boot management system of mobile communication terminal, method of updating file in mobile communication terminal, and method of booting mobile communication terminal | Oct 24, 2005 | Issued |
Array
(
[id] => 5001331
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[patent_issue_date] => 2007-02-22
[patent_title] => 'Dynamic memory sizing for power reduction'
[patent_app_type] => utility
[patent_app_number] => 11/208935
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[firstpage_image] =>[orig_patent_app_number] => 11208935
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/208935 | Dynamic memory sizing for power reduction | Aug 21, 2005 | Abandoned |
Array
(
[id] => 5497535
[patent_doc_number] => 20090265563
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-10-22
[patent_title] => 'SYSTEMS AND METHODS OPERABLE TO ALLOW LOOP POWERING OF NETWORKED DEVICES'
[patent_app_type] => utility
[patent_app_number] => 11/207601
[patent_app_country] => US
[patent_app_date] => 2005-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0265/20090265563.pdf
[firstpage_image] =>[orig_patent_app_number] => 11207601
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/207601 | Systems and methods operable to allow loop powering of networked devices | Aug 18, 2005 | Issued |