Search

Jack Cooper

Examiner (ID: 2250)

Most Active Art Unit
1103
Art Unit(s)
1108, 1111, 1107, 1103, 1109
Total Applications
844
Issued Applications
585
Pending Applications
2
Abandoned Applications
257

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 146663 [patent_doc_number] => 07689853 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-30 [patent_title] => 'Synchronization of network communication link' [patent_app_type] => utility [patent_app_number] => 10/793585 [patent_app_country] => US [patent_app_date] => 2004-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 6704 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/689/07689853.pdf [firstpage_image] =>[orig_patent_app_number] => 10793585 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/793585
Synchronization of network communication link Mar 3, 2004 Issued
Array ( [id] => 596713 [patent_doc_number] => 07454650 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-18 [patent_title] => 'Microcontroller having a system resource prescaler thereon' [patent_app_type] => utility [patent_app_number] => 10/790016 [patent_app_country] => US [patent_app_date] => 2004-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 5024 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/454/07454650.pdf [firstpage_image] =>[orig_patent_app_number] => 10790016 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/790016
Microcontroller having a system resource prescaler thereon Mar 1, 2004 Issued
Array ( [id] => 188611 [patent_doc_number] => 07647490 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-12 [patent_title] => 'Method and apparatus for providing updated system locality information during runtime' [patent_app_type] => utility [patent_app_number] => 10/777438 [patent_app_country] => US [patent_app_date] => 2004-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3701 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/647/07647490.pdf [firstpage_image] =>[orig_patent_app_number] => 10777438 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/777438
Method and apparatus for providing updated system locality information during runtime Feb 10, 2004 Issued
Array ( [id] => 508299 [patent_doc_number] => 07210029 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-24 [patent_title] => 'System and method for transferring rewrite programs to two computers in a processing system' [patent_app_type] => utility [patent_app_number] => 10/775130 [patent_app_country] => US [patent_app_date] => 2004-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2821 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/210/07210029.pdf [firstpage_image] =>[orig_patent_app_number] => 10775130 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/775130
System and method for transferring rewrite programs to two computers in a processing system Feb 10, 2004 Issued
Array ( [id] => 6981443 [patent_doc_number] => 20050151511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-14 [patent_title] => 'Transferring power between devices in a personal area network' [patent_app_type] => utility [patent_app_number] => 10/757914 [patent_app_country] => US [patent_app_date] => 2004-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3119 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20050151511.pdf [firstpage_image] =>[orig_patent_app_number] => 10757914 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/757914
Transferring power between devices in a personal area network Jan 13, 2004 Abandoned
Array ( [id] => 411432 [patent_doc_number] => 07287153 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-10-23 [patent_title] => 'Processing of processor performance state information' [patent_app_type] => utility [patent_app_number] => 10/757273 [patent_app_country] => US [patent_app_date] => 2004-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4941 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/287/07287153.pdf [firstpage_image] =>[orig_patent_app_number] => 10757273 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/757273
Processing of processor performance state information Jan 13, 2004 Issued
Array ( [id] => 458149 [patent_doc_number] => 07249274 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-07-24 [patent_title] => 'System and method for scalable clock gearing mechanism' [patent_app_type] => utility [patent_app_number] => 10/748836 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3235 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/249/07249274.pdf [firstpage_image] =>[orig_patent_app_number] => 10748836 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/748836
System and method for scalable clock gearing mechanism Dec 29, 2003 Issued
Array ( [id] => 663006 [patent_doc_number] => 07107443 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-12 [patent_title] => 'Method for customizing a computer system by using stored configuration parameters in a configurism mechanism' [patent_app_type] => utility [patent_app_number] => 10/748431 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1982 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/107/07107443.pdf [firstpage_image] =>[orig_patent_app_number] => 10748431 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/748431
Method for customizing a computer system by using stored configuration parameters in a configurism mechanism Dec 29, 2003 Issued
Array ( [id] => 485746 [patent_doc_number] => 07225325 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-29 [patent_title] => 'Customizing a computer system by using stored configuration parameters in a configuration mechanism' [patent_app_type] => utility [patent_app_number] => 10/748630 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1982 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/225/07225325.pdf [firstpage_image] =>[orig_patent_app_number] => 10748630 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/748630
Customizing a computer system by using stored configuration parameters in a configuration mechanism Dec 29, 2003 Issued
Array ( [id] => 7262119 [patent_doc_number] => 20050144429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-30 [patent_title] => 'System for customizing a computer system' [patent_app_type] => utility [patent_app_number] => 10/748937 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1788 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0144/20050144429.pdf [firstpage_image] =>[orig_patent_app_number] => 10748937 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/748937
System for customizing a computer system Dec 29, 2003 Abandoned
Array ( [id] => 513187 [patent_doc_number] => 07206929 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-17 [patent_title] => 'Method for customizing a computer system by using stored configuration parameters in a configurism mechanism' [patent_app_type] => utility [patent_app_number] => 10/748898 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1788 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/206/07206929.pdf [firstpage_image] =>[orig_patent_app_number] => 10748898 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/748898
Method for customizing a computer system by using stored configuration parameters in a configurism mechanism Dec 29, 2003 Issued
Array ( [id] => 7262129 [patent_doc_number] => 20050144432 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-30 [patent_title] => 'Method for updating BIOS setting' [patent_app_type] => utility [patent_app_number] => 10/707651 [patent_app_country] => US [patent_app_date] => 2003-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2263 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0144/20050144432.pdf [firstpage_image] =>[orig_patent_app_number] => 10707651 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/707651
Method for updating BIOS setting Dec 29, 2003 Abandoned
Array ( [id] => 7328552 [patent_doc_number] => 20040139239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-15 [patent_title] => 'Bundle skew management and cell synchronization' [patent_app_type] => new [patent_app_number] => 10/745903 [patent_app_country] => US [patent_app_date] => 2003-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3001 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0139/20040139239.pdf [firstpage_image] =>[orig_patent_app_number] => 10745903 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/745903
Bundle skew management and cell synchronization Dec 22, 2003 Issued
Array ( [id] => 7672080 [patent_doc_number] => 20040181699 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-16 [patent_title] => 'POWER SUPPLY CONTROLLER AND INFORMATION PROCESSOR' [patent_app_type] => new [patent_app_number] => 10/707389 [patent_app_country] => US [patent_app_date] => 2003-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4717 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20040181699.pdf [firstpage_image] =>[orig_patent_app_number] => 10707389 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/707389
Power supply controller for changing in a predetermined temporal order a combination of voltages supplied to an information processor Dec 9, 2003 Issued
Array ( [id] => 7474673 [patent_doc_number] => 20040103335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-27 [patent_title] => 'Device and method to detect and correct for clock duty cycle skew in a processor' [patent_app_type] => new [patent_app_number] => 10/718282 [patent_app_country] => US [patent_app_date] => 2003-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3441 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20040103335.pdf [firstpage_image] =>[orig_patent_app_number] => 10718282 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/718282
Method and apparatus for detecting and correcting clock duty cycle skew in a processor Nov 18, 2003 Issued
Array ( [id] => 7465858 [patent_doc_number] => 20040095933 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-20 [patent_title] => 'Structure cabling system' [patent_app_type] => new [patent_app_number] => 10/712328 [patent_app_country] => US [patent_app_date] => 2003-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 60 [patent_figures_cnt] => 60 [patent_no_of_words] => 25369 [patent_no_of_claims] => 109 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20040095933.pdf [firstpage_image] =>[orig_patent_app_number] => 10712328 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/712328
Determining whether characteristics of a local area network node allow it to receive power over communication cabling Nov 11, 2003 Issued
Array ( [id] => 447408 [patent_doc_number] => 07257720 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-14 [patent_title] => 'Semiconductor processing device for connecting a non-volatile storage device to a general purpose bus of a host system' [patent_app_type] => utility [patent_app_number] => 10/702448 [patent_app_country] => US [patent_app_date] => 2003-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 9440 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/257/07257720.pdf [firstpage_image] =>[orig_patent_app_number] => 10702448 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/702448
Semiconductor processing device for connecting a non-volatile storage device to a general purpose bus of a host system Nov 6, 2003 Issued
Array ( [id] => 466084 [patent_doc_number] => 07243254 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-07-10 [patent_title] => 'Low power memory controller that is adaptable to either double data rate DRAM or single data rate synchronous DRAM circuits' [patent_app_type] => utility [patent_app_number] => 10/701639 [patent_app_country] => US [patent_app_date] => 2003-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5969 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/243/07243254.pdf [firstpage_image] =>[orig_patent_app_number] => 10701639 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/701639
Low power memory controller that is adaptable to either double data rate DRAM or single data rate synchronous DRAM circuits Nov 4, 2003 Issued
Array ( [id] => 4448997 [patent_doc_number] => 07865749 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-04 [patent_title] => 'Method and apparatus for dynamic system-level frequency scaling' [patent_app_type] => utility [patent_app_number] => 10/595520 [patent_app_country] => US [patent_app_date] => 2003-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3883 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/865/07865749.pdf [firstpage_image] =>[orig_patent_app_number] => 10595520 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/595520
Method and apparatus for dynamic system-level frequency scaling Oct 30, 2003 Issued
Array ( [id] => 653626 [patent_doc_number] => 07114066 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-09-26 [patent_title] => 'Method, apparatus, and computer-readable medium for ensuring compatibility between an operating system and a BIOS redirection component' [patent_app_type] => utility [patent_app_number] => 10/688385 [patent_app_country] => US [patent_app_date] => 2003-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5129 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/114/07114066.pdf [firstpage_image] =>[orig_patent_app_number] => 10688385 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/688385
Method, apparatus, and computer-readable medium for ensuring compatibility between an operating system and a BIOS redirection component Oct 16, 2003 Issued
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