| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 7615388
[patent_doc_number] => 06948059
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-09-20
[patent_title] => 'Component loader for industrial control device providing resource search capabilities'
[patent_app_type] => utility
[patent_app_number] => 09/670926
[patent_app_country] => US
[patent_app_date] => 2000-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 4688
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 248
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/948/06948059.pdf
[firstpage_image] =>[orig_patent_app_number] => 09670926
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/670926 | Component loader for industrial control device providing resource search capabilities | Sep 27, 2000 | Issued |
Array
(
[id] => 663088
[patent_doc_number] => 07107465
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-09-12
[patent_title] => 'PCI bus interface circuit for supplying either a main supply voltage or an auxiliary voltage to a PCI plug-in-card'
[patent_app_type] => utility
[patent_app_number] => 10/089424
[patent_app_country] => US
[patent_app_date] => 2000-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 3547
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 315
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/107/07107465.pdf
[firstpage_image] =>[orig_patent_app_number] => 10089424
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/089424 | PCI bus interface circuit for supplying either a main supply voltage or an auxiliary voltage to a PCI plug-in-card | Sep 21, 2000 | Issued |
Array
(
[id] => 1186036
[patent_doc_number] => 06745369
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-06-01
[patent_title] => 'Bus architecture for system on a chip'
[patent_app_type] => B1
[patent_app_number] => 09/668665
[patent_app_country] => US
[patent_app_date] => 2000-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3458
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 41
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/745/06745369.pdf
[firstpage_image] =>[orig_patent_app_number] => 09668665
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/668665 | Bus architecture for system on a chip | Sep 21, 2000 | Issued |
Array
(
[id] => 695397
[patent_doc_number] => 07076670
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-07-11
[patent_title] => 'Two stage power supply circuit for independently supplying power to first and second components of a digital processing system'
[patent_app_type] => utility
[patent_app_number] => 09/656504
[patent_app_country] => US
[patent_app_date] => 2000-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 3225
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/076/07076670.pdf
[firstpage_image] =>[orig_patent_app_number] => 09656504
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/656504 | Two stage power supply circuit for independently supplying power to first and second components of a digital processing system | Sep 6, 2000 | Issued |
Array
(
[id] => 1170366
[patent_doc_number] => 06766463
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-07-20
[patent_title] => 'Method and apparatus for controlling and normalizing the desired rate of a visual process across different computing platforms and environments'
[patent_app_type] => B1
[patent_app_number] => 09/639534
[patent_app_country] => US
[patent_app_date] => 2000-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2882
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/766/06766463.pdf
[firstpage_image] =>[orig_patent_app_number] => 09639534
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/639534 | Method and apparatus for controlling and normalizing the desired rate of a visual process across different computing platforms and environments | Aug 15, 2000 | Issued |
Array
(
[id] => 1218291
[patent_doc_number] => 06711696
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-03-23
[patent_title] => 'Method for transfering data between two different clock domains by calculating which pulses of the faster clock domain should be skipped substantially simultaneously with the transfer'
[patent_app_type] => B1
[patent_app_number] => 09/637985
[patent_app_country] => US
[patent_app_date] => 2000-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 5558
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/711/06711696.pdf
[firstpage_image] =>[orig_patent_app_number] => 09637985
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/637985 | Method for transfering data between two different clock domains by calculating which pulses of the faster clock domain should be skipped substantially simultaneously with the transfer | Aug 10, 2000 | Issued |
Array
(
[id] => 1149832
[patent_doc_number] => 06782486
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-08-24
[patent_title] => 'Apparatus for stopping and starting a clock in a clock forwarded I/O system depending on the presence of valid data in a receive buffer'
[patent_app_type] => B1
[patent_app_number] => 09/637178
[patent_app_country] => US
[patent_app_date] => 2000-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 2
[patent_no_of_words] => 2494
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/782/06782486.pdf
[firstpage_image] =>[orig_patent_app_number] => 09637178
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/637178 | Apparatus for stopping and starting a clock in a clock forwarded I/O system depending on the presence of valid data in a receive buffer | Aug 10, 2000 | Issued |
Array
(
[id] => 1183726
[patent_doc_number] => 06751740
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-06-15
[patent_title] => 'Method and system for using a combined power detect and presence detect signal to determine if a memory module is connected and receiving power'
[patent_app_type] => B1
[patent_app_number] => 09/638050
[patent_app_country] => US
[patent_app_date] => 2000-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2272
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/751/06751740.pdf
[firstpage_image] =>[orig_patent_app_number] => 09638050
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/638050 | Method and system for using a combined power detect and presence detect signal to determine if a memory module is connected and receiving power | Aug 10, 2000 | Issued |
Array
(
[id] => 1234438
[patent_doc_number] => 06697955
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-02-24
[patent_title] => 'Method and apparatus for using an energy reserve to provide voltage to a power factor correction circuit in the event of a power interuption'
[patent_app_type] => B1
[patent_app_number] => 09/620087
[patent_app_country] => US
[patent_app_date] => 2000-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 1822
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/697/06697955.pdf
[firstpage_image] =>[orig_patent_app_number] => 09620087
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/620087 | Method and apparatus for using an energy reserve to provide voltage to a power factor correction circuit in the event of a power interuption | Jul 19, 2000 | Issued |
Array
(
[id] => 1181227
[patent_doc_number] => 06754815
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-06-22
[patent_title] => 'Method and system for scrubbing an isolated area of memory after reset of a processor operating in isolated execution mode if a cleanup flag is set'
[patent_app_type] => B1
[patent_app_number] => 09/618659
[patent_app_country] => US
[patent_app_date] => 2000-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 9163
[patent_no_of_claims] => 52
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/754/06754815.pdf
[firstpage_image] =>[orig_patent_app_number] => 09618659
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/618659 | Method and system for scrubbing an isolated area of memory after reset of a processor operating in isolated execution mode if a cleanup flag is set | Jul 17, 2000 | Issued |
Array
(
[id] => 1197097
[patent_doc_number] => 06732287
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-05-04
[patent_title] => 'Method for processing dynamically allocated timers in a real time operating system'
[patent_app_type] => B1
[patent_app_number] => 09/599271
[patent_app_country] => US
[patent_app_date] => 2000-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 28
[patent_no_of_words] => 9094
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/732/06732287.pdf
[firstpage_image] =>[orig_patent_app_number] => 09599271
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/599271 | Method for processing dynamically allocated timers in a real time operating system | Jun 21, 2000 | Issued |
Array
(
[id] => 7623789
[patent_doc_number] => 06725388
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-04-20
[patent_title] => 'Method and system for performing link synchronization between two clock domains by inserting command signals into a data stream transmitted between the two clock domains'
[patent_app_type] => B1
[patent_app_number] => 09/592670
[patent_app_country] => US
[patent_app_date] => 2000-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 6677
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 4
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/725/06725388.pdf
[firstpage_image] =>[orig_patent_app_number] => 09592670
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/592670 | Method and system for performing link synchronization between two clock domains by inserting command signals into a data stream transmitted between the two clock domains | Jun 12, 2000 | Issued |
Array
(
[id] => 1037179
[patent_doc_number] => 06877098
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-04-05
[patent_title] => 'System and method for directing access from a framebuffer to a virtual framebuffer when the framebuffer is powered off in a power management mode'
[patent_app_type] => utility
[patent_app_number] => 09/591926
[patent_app_country] => US
[patent_app_date] => 2000-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4717
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/877/06877098.pdf
[firstpage_image] =>[orig_patent_app_number] => 09591926
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/591926 | System and method for directing access from a framebuffer to a virtual framebuffer when the framebuffer is powered off in a power management mode | Jun 11, 2000 | Issued |
Array
(
[id] => 1206969
[patent_doc_number] => 06721893
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-04-13
[patent_title] => 'System for suspending operation of a switching regulator circuit in a power supply if the temperature of the switching regulator is too high'
[patent_app_type] => B1
[patent_app_number] => 09/591993
[patent_app_country] => US
[patent_app_date] => 2000-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3243
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/721/06721893.pdf
[firstpage_image] =>[orig_patent_app_number] => 09591993
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/591993 | System for suspending operation of a switching regulator circuit in a power supply if the temperature of the switching regulator is too high | Jun 11, 2000 | Issued |
Array
(
[id] => 1229287
[patent_doc_number] => 06701442
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-03-02
[patent_title] => 'Power management circuit for selectively applying power to network monitoring circuitry which monitors the receipt of network wake-up messages'
[patent_app_type] => B1
[patent_app_number] => 09/568195
[patent_app_country] => US
[patent_app_date] => 2000-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3702
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 232
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/701/06701442.pdf
[firstpage_image] =>[orig_patent_app_number] => 09568195
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/568195 | Power management circuit for selectively applying power to network monitoring circuitry which monitors the receipt of network wake-up messages | May 8, 2000 | Issued |
Array
(
[id] => 992717
[patent_doc_number] => 06920553
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-07-19
[patent_title] => 'Method and apparatus for reading initial boot instructions from a bootable device connected to the USB port of a computer system'
[patent_app_type] => utility
[patent_app_number] => 09/560858
[patent_app_country] => US
[patent_app_date] => 2000-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1398
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 34
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/920/06920553.pdf
[firstpage_image] =>[orig_patent_app_number] => 09560858
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/560858 | Method and apparatus for reading initial boot instructions from a bootable device connected to the USB port of a computer system | Apr 27, 2000 | Issued |
Array
(
[id] => 7622326
[patent_doc_number] => 06687840
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-02-03
[patent_title] => 'Multi-link extensions and bundle skew management'
[patent_app_type] => B1
[patent_app_number] => 09/557099
[patent_app_country] => US
[patent_app_date] => 2000-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 2891
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 4
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/687/06687840.pdf
[firstpage_image] =>[orig_patent_app_number] => 09557099
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/557099 | Multi-link extensions and bundle skew management | Apr 20, 2000 | Issued |
Array
(
[id] => 1201093
[patent_doc_number] => 06728893
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-04-27
[patent_title] => 'Power management system for a random number generator'
[patent_app_type] => B1
[patent_app_number] => 09/553925
[patent_app_country] => US
[patent_app_date] => 2000-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3357
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/728/06728893.pdf
[firstpage_image] =>[orig_patent_app_number] => 09553925
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/553925 | Power management system for a random number generator | Apr 20, 2000 | Issued |
Array
(
[id] => 1395996
[patent_doc_number] => 06567922
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-05-20
[patent_title] => 'Pulse type activating system for power supply'
[patent_app_type] => B1
[patent_app_number] => 09/556953
[patent_app_country] => US
[patent_app_date] => 2000-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 13
[patent_no_of_words] => 1999
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 270
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/567/06567922.pdf
[firstpage_image] =>[orig_patent_app_number] => 09556953
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/556953 | Pulse type activating system for power supply | Apr 20, 2000 | Issued |
Array
(
[id] => 1210411
[patent_doc_number] => 06718462
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-04-06
[patent_title] => 'Sending a CD boot block to a client computer to gather client information and send it to a server in order to create an instance for client computer'
[patent_app_type] => B1
[patent_app_number] => 09/552858
[patent_app_country] => US
[patent_app_date] => 2000-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 3801
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/718/06718462.pdf
[firstpage_image] =>[orig_patent_app_number] => 09552858
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/552858 | Sending a CD boot block to a client computer to gather client information and send it to a server in order to create an instance for client computer | Apr 19, 2000 | Issued |