
Jack Dinh
Examiner (ID: 394, Phone: (571)272-2327 , Office: P/2872 )
| Most Active Art Unit | 2872 |
| Art Unit(s) | 2872, 2873 |
| Total Applications | 1839 |
| Issued Applications | 1588 |
| Pending Applications | 122 |
| Abandoned Applications | 164 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6825400
[patent_doc_number] => 20030236022
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-12-25
[patent_title] => 'Apparatus for indicating a terminal insertion position'
[patent_app_type] => new
[patent_app_number] => 10/422991
[patent_app_country] => US
[patent_app_date] => 2003-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 12215
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 198
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0236/20030236022.pdf
[firstpage_image] =>[orig_patent_app_number] => 10422991
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/422991 | Apparatus for indicating a terminal insertion position | Apr 24, 2003 | Abandoned |
Array
(
[id] => 631971
[patent_doc_number] => 07127810
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-10-31
[patent_title] => 'Method of manufacturing electronic device including aligning first substrate, second substrate and mask, and transferring object from first substrate to second substrate, including irradiating object on first substrate with light through mask'
[patent_app_type] => utility
[patent_app_number] => 10/420882
[patent_app_country] => US
[patent_app_date] => 2003-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 25
[patent_no_of_words] => 10168
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/127/07127810.pdf
[firstpage_image] =>[orig_patent_app_number] => 10420882
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/420882 | Method of manufacturing electronic device including aligning first substrate, second substrate and mask, and transferring object from first substrate to second substrate, including irradiating object on first substrate with light through mask | Apr 22, 2003 | Issued |
Array
(
[id] => 6737231
[patent_doc_number] => 20030154599
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-08-21
[patent_title] => 'Method for reducing apparent height of a board system'
[patent_app_type] => new
[patent_app_number] => 10/420291
[patent_app_country] => US
[patent_app_date] => 2003-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2687
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0154/20030154599.pdf
[firstpage_image] =>[orig_patent_app_number] => 10420291
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/420291 | Method for reducing apparent height of a board system | Apr 21, 2003 | Abandoned |
Array
(
[id] => 6863432
[patent_doc_number] => 20030188958
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-10-09
[patent_title] => 'Micro-electro mechanical system'
[patent_app_type] => new
[patent_app_number] => 10/407353
[patent_app_country] => US
[patent_app_date] => 2003-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2080
[patent_no_of_claims] => 52
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0188/20030188958.pdf
[firstpage_image] =>[orig_patent_app_number] => 10407353
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/407353 | Micro-electro mechanical system | Apr 3, 2003 | Abandoned |
Array
(
[id] => 6768860
[patent_doc_number] => 20030214800
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-11-20
[patent_title] => 'System and method for processor power delivery and thermal management'
[patent_app_type] => new
[patent_app_number] => 10/401103
[patent_app_country] => US
[patent_app_date] => 2003-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 37
[patent_figures_cnt] => 37
[patent_no_of_words] => 12810
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 335
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0214/20030214800.pdf
[firstpage_image] =>[orig_patent_app_number] => 10401103
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/401103 | System and method for processor power delivery and thermal management | Mar 24, 2003 | Abandoned |
Array
(
[id] => 6793656
[patent_doc_number] => 20030172529
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-09-18
[patent_title] => 'Crimp press for the production of a crimping connection'
[patent_app_type] => new
[patent_app_number] => 10/387632
[patent_app_country] => US
[patent_app_date] => 2003-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3726
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0172/20030172529.pdf
[firstpage_image] =>[orig_patent_app_number] => 10387632
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/387632 | Crimp press for the production of a crimping connection | Mar 12, 2003 | Issued |
Array
(
[id] => 5644592
[patent_doc_number] => 20060130324
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-22
[patent_title] => 'Method for fine machining cylindrical inner surfaces'
[patent_app_type] => utility
[patent_app_number] => 10/509758
[patent_app_country] => US
[patent_app_date] => 2003-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1831
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0130/20060130324.pdf
[firstpage_image] =>[orig_patent_app_number] => 10509758
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/509758 | Method for fine machining cylindrical inner surfaces | Mar 11, 2003 | Abandoned |
Array
(
[id] => 6707100
[patent_doc_number] => 20030153834
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-08-14
[patent_title] => 'Ultrasound probe wiring method and apparatus'
[patent_app_type] => new
[patent_app_number] => 10/386302
[patent_app_country] => US
[patent_app_date] => 2003-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4048
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0153/20030153834.pdf
[firstpage_image] =>[orig_patent_app_number] => 10386302
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/386302 | Integrated circuit wiring method | Mar 10, 2003 | Issued |
Array
(
[id] => 6793653
[patent_doc_number] => 20030172526
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-09-18
[patent_title] => 'Production method of printed circuit board'
[patent_app_type] => new
[patent_app_number] => 10/385172
[patent_app_country] => US
[patent_app_date] => 2003-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4962
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0172/20030172526.pdf
[firstpage_image] =>[orig_patent_app_number] => 10385172
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/385172 | Production method of printed circuit board | Mar 9, 2003 | Issued |
Array
(
[id] => 6826576
[patent_doc_number] => 20030177634
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-09-25
[patent_title] => 'Subtractive process for fabricating cylindrical printed circuit boards'
[patent_app_type] => new
[patent_app_number] => 10/383321
[patent_app_country] => US
[patent_app_date] => 2003-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 4085
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0177/20030177634.pdf
[firstpage_image] =>[orig_patent_app_number] => 10383321
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/383321 | Subtractive process for fabricating cylindrical printed circuit boards | Mar 5, 2003 | Abandoned |
Array
(
[id] => 6840670
[patent_doc_number] => 20030146017
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-08-07
[patent_title] => 'A Method of Forming A HiGH RELIABILITY INTERPOSER FOR LOW COST HIGH RELIABILITY APPLICATIONS'
[patent_app_type] => new
[patent_app_number] => 10/378141
[patent_app_country] => US
[patent_app_date] => 2003-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3471
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0146/20030146017.pdf
[firstpage_image] =>[orig_patent_app_number] => 10378141
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/378141 | A Method of Forming A HiGH RELIABILITY INTERPOSER FOR LOW COST HIGH RELIABILITY APPLICATIONS | Mar 3, 2003 | Abandoned |
Array
(
[id] => 477485
[patent_doc_number] => 07219419
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-05-22
[patent_title] => 'Component mounting apparatus including a polishing device'
[patent_app_type] => utility
[patent_app_number] => 10/375953
[patent_app_country] => US
[patent_app_date] => 2003-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 13
[patent_no_of_words] => 6842
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 280
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/219/07219419.pdf
[firstpage_image] =>[orig_patent_app_number] => 10375953
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/375953 | Component mounting apparatus including a polishing device | Feb 27, 2003 | Issued |
Array
(
[id] => 7142383
[patent_doc_number] => 20040168312
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-02
[patent_title] => 'PCB with inlaid outerlayer circuits and production methods thereof'
[patent_app_type] => new
[patent_app_number] => 10/375361
[patent_app_country] => US
[patent_app_date] => 2003-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3194
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 21
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0168/20040168312.pdf
[firstpage_image] =>[orig_patent_app_number] => 10375361
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/375361 | PCB with inlaid outer-layer circuits and production methods thereof | Feb 27, 2003 | Issued |
Array
(
[id] => 7151444
[patent_doc_number] => 20050081372
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-21
[patent_title] => 'Connector connecting /disconnecting tool'
[patent_app_type] => utility
[patent_app_number] => 10/505652
[patent_app_country] => US
[patent_app_date] => 2003-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 12270
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0081/20050081372.pdf
[firstpage_image] =>[orig_patent_app_number] => 10505652
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/505652 | System for mating and demating multiple connectors mounted on board of semiconductor test apparatus | Feb 24, 2003 | Issued |
Array
(
[id] => 6703910
[patent_doc_number] => 20030150644
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-08-14
[patent_title] => 'Printed wiring board and method of manufacturing the same'
[patent_app_type] => new
[patent_app_number] => 10/367711
[patent_app_country] => US
[patent_app_date] => 2003-02-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 33
[patent_figures_cnt] => 33
[patent_no_of_words] => 25748
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 14
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0150/20030150644.pdf
[firstpage_image] =>[orig_patent_app_number] => 10367711
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/367711 | Method of manufacturing a printed wiring board having a previously formed opening hole in an innerlayer conductor circuit | Feb 18, 2003 | Issued |
Array
(
[id] => 7434317
[patent_doc_number] => 20040049915
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-03-18
[patent_title] => 'Method for prestressing tubes of a heat exchanger with precise tailoring of the prestress'
[patent_app_type] => new
[patent_app_number] => 10/350079
[patent_app_country] => US
[patent_app_date] => 2003-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4508
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0049/20040049915.pdf
[firstpage_image] =>[orig_patent_app_number] => 10350079
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/350079 | Method for prestressing tubes of a heat exchanger with precise tailoring of the prestress | Jan 23, 2003 | Abandoned |
Array
(
[id] => 6764676
[patent_doc_number] => 20030099074
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-05-29
[patent_title] => 'Electronic device with double-wire bonding, manufacturing method thereof, and method for checking intactness of bonding wires of this electronic device'
[patent_app_type] => new
[patent_app_number] => 10/337153
[patent_app_country] => US
[patent_app_date] => 2003-01-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4142
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0099/20030099074.pdf
[firstpage_image] =>[orig_patent_app_number] => 10337153
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/337153 | Methods of manufacturing and testing bonding wires | Jan 1, 2003 | Issued |
Array
(
[id] => 6666730
[patent_doc_number] => 20030111713
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-06-19
[patent_title] => 'Manufacturing method of tape carrier package and the system thereof'
[patent_app_type] => new
[patent_app_number] => 10/317882
[patent_app_country] => US
[patent_app_date] => 2002-12-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 1796
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 48
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0111/20030111713.pdf
[firstpage_image] =>[orig_patent_app_number] => 10317882
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/317882 | Manufacturing method of tape carrier package and the system thereof | Dec 11, 2002 | Abandoned |
Array
(
[id] => 962430
[patent_doc_number] => 06948239
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-09-27
[patent_title] => 'Method for fabricating semiconductor apparatus using board frame'
[patent_app_type] => utility
[patent_app_number] => 10/317152
[patent_app_country] => US
[patent_app_date] => 2002-12-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 34
[patent_no_of_words] => 8360
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/948/06948239.pdf
[firstpage_image] =>[orig_patent_app_number] => 10317152
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/317152 | Method for fabricating semiconductor apparatus using board frame | Dec 11, 2002 | Issued |
Array
(
[id] => 7284645
[patent_doc_number] => 20040107566
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-06-10
[patent_title] => 'System and method for information handling system motherboard assembly'
[patent_app_type] => new
[patent_app_number] => 10/314811
[patent_app_country] => US
[patent_app_date] => 2002-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2425
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0107/20040107566.pdf
[firstpage_image] =>[orig_patent_app_number] => 10314811
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/314811 | Method for assembly of a motherboard into an information handling system chassis | Dec 8, 2002 | Issued |