Search

Jack S. J. Chen

Examiner (ID: 1643, Phone: (571)272-1689 , Office: P/2893 )

Most Active Art Unit
2893
Art Unit(s)
2893, 2813
Total Applications
1864
Issued Applications
1486
Pending Applications
133
Abandoned Applications
267

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18520886 [patent_doc_number] => 11710781 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-25 [patent_title] => Growth process and methods thereof [patent_app_type] => utility [patent_app_number] => 17/460699 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 36 [patent_no_of_words] => 10126 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17460699 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/460699
Growth process and methods thereof Aug 29, 2021 Issued
Array ( [id] => 18782353 [patent_doc_number] => 11824120 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Method of fabricating a source/drain recess in a semiconductor device [patent_app_type] => utility [patent_app_number] => 17/446262 [patent_app_country] => US [patent_app_date] => 2021-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3856 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17446262 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/446262
Method of fabricating a source/drain recess in a semiconductor device Aug 26, 2021 Issued
Array ( [id] => 17448133 [patent_doc_number] => 20220068638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => METHOD FOR GERMANIUM ENRICHMENT AROUND THE CHANNEL OF A TRANSISTOR [patent_app_type] => utility [patent_app_number] => 17/445747 [patent_app_country] => US [patent_app_date] => 2021-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3160 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17445747 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/445747
Method for germanium enrichment around the channel of a transistor Aug 23, 2021 Issued
Array ( [id] => 18097383 [patent_doc_number] => 20220415724 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => MULTIPLE-LEVEL INTERCONNECT STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/394197 [patent_app_country] => US [patent_app_date] => 2021-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4321 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17394197 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/394197
Multiple-level interconnect structure and manufacturing method thereof Aug 3, 2021 Issued
Array ( [id] => 19444498 [patent_doc_number] => 12094787 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-17 [patent_title] => Characterizing defects in semiconductor layers [patent_app_type] => utility [patent_app_number] => 17/393037 [patent_app_country] => US [patent_app_date] => 2021-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 7339 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17393037 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/393037
Characterizing defects in semiconductor layers Aug 2, 2021 Issued
Array ( [id] => 18696586 [patent_doc_number] => 20230327027 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => LOW-LEAKAGE SCHOTTKY DIODES AND METHOD OF MAKING A POWER SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/016755 [patent_app_country] => US [patent_app_date] => 2021-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9985 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18016755 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/016755
Low-leakage Schottky diodes and method of making a power semiconductor device Jul 29, 2021 Issued
Array ( [id] => 17218153 [patent_doc_number] => 20210351491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-11 [patent_title] => ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/383403 [patent_app_country] => US [patent_app_date] => 2021-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10437 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17383403 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/383403
Electronic device and manufacturing method thereof Jul 21, 2021 Issued
Array ( [id] => 18608243 [patent_doc_number] => 11749722 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/377955 [patent_app_country] => US [patent_app_date] => 2021-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6653 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17377955 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/377955
Semiconductor device Jul 15, 2021 Issued
Array ( [id] => 17359791 [patent_doc_number] => 20220020587 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-20 [patent_title] => Method of Manufacturing a Semiconductor Structure [patent_app_type] => utility [patent_app_number] => 17/375222 [patent_app_country] => US [patent_app_date] => 2021-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9501 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17375222 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/375222
Method of manufacturing a semiconductor structure Jul 13, 2021 Issued
Array ( [id] => 18641323 [patent_doc_number] => 11765967 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Highly efficient OLED devices with very short decay times [patent_app_type] => utility [patent_app_number] => 17/365150 [patent_app_country] => US [patent_app_date] => 2021-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 17985 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17365150 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/365150
Highly efficient OLED devices with very short decay times Jun 30, 2021 Issued
Array ( [id] => 20896370 [patent_doc_number] => 12703625 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-08-11 [patent_title] => Through-substrate conductor support [patent_app_type] => utility [patent_app_number] => 17/365067 [patent_app_country] => US [patent_app_date] => 2021-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 3260 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17365067 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/365067
THROUGH-SUBSTRATE CONDUCTOR SUPPORT Jun 30, 2021 Pending
Array ( [id] => 17174301 [patent_doc_number] => 20210327972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => DISPLAY SUBSTRATE, DISPLAY PANEL AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/361748 [patent_app_country] => US [patent_app_date] => 2021-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13286 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17361748 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/361748
Display substrate, display panel and display device Jun 28, 2021 Issued
Array ( [id] => 18357798 [patent_doc_number] => 11646204 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-09 [patent_title] => Method for forming a layer provided with silicon [patent_app_type] => utility [patent_app_number] => 17/352555 [patent_app_country] => US [patent_app_date] => 2021-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3821 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17352555 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/352555
Method for forming a layer provided with silicon Jun 20, 2021 Issued
Array ( [id] => 17303306 [patent_doc_number] => 20210399145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => III-Nitride Diode With A Modified Access Region [patent_app_type] => utility [patent_app_number] => 17/350563 [patent_app_country] => US [patent_app_date] => 2021-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7222 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17350563 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/350563
III-nitride diode with a modified access region Jun 16, 2021 Issued
Array ( [id] => 17893198 [patent_doc_number] => 11456178 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-27 [patent_title] => Gate interface engineering with doped layer [patent_app_type] => utility [patent_app_number] => 17/348081 [patent_app_country] => US [patent_app_date] => 2021-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 7913 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17348081 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/348081
Gate interface engineering with doped layer Jun 14, 2021 Issued
Array ( [id] => 19063111 [patent_doc_number] => 11942361 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-26 [patent_title] => Semiconductor device cavity formation using directional deposition [patent_app_type] => utility [patent_app_number] => 17/348093 [patent_app_country] => US [patent_app_date] => 2021-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4015 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17348093 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/348093
Semiconductor device cavity formation using directional deposition Jun 14, 2021 Issued
Array ( [id] => 20177465 [patent_doc_number] => 12396230 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-19 [patent_title] => SiC semiconductor device manufacturing method and SiC semiconductor device [patent_app_type] => utility [patent_app_number] => 18/007985 [patent_app_country] => US [patent_app_date] => 2021-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 2298 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18007985 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/007985
SiC semiconductor device manufacturing method and SiC semiconductor device May 26, 2021 Issued
Array ( [id] => 17347025 [patent_doc_number] => 20220013356 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-13 [patent_title] => THIN-FILM TRANSISTORS HAVING HYBRID CRYSTALLINE SEMICONDUCTOR CHANNEL LAYER AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/306414 [patent_app_country] => US [patent_app_date] => 2021-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8468 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17306414 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/306414
THIN-FILM TRANSISTORS HAVING HYBRID CRYSTALLINE SEMICONDUCTOR CHANNEL LAYER AND METHODS OF FORMING THE SAME May 2, 2021 Pending
Array ( [id] => 20177432 [patent_doc_number] => 12396197 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-19 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/925987 [patent_app_country] => US [patent_app_date] => 2021-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 3326 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17925987 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/925987
Semiconductor device Apr 15, 2021 Issued
Array ( [id] => 17551605 [patent_doc_number] => 20220122947 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-21 [patent_title] => SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/218831 [patent_app_country] => US [patent_app_date] => 2021-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14055 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17218831 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/218831
Semiconductor structure and forming method thereof Mar 30, 2021 Issued
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