Search

Jack S. J. Chen

Examiner (ID: 8129, Phone: (571)272-1689 , Office: P/2893 )

Most Active Art Unit
2893
Art Unit(s)
2813, 2893
Total Applications
1826
Issued Applications
1467
Pending Applications
139
Abandoned Applications
265

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18008639 [patent_doc_number] => 20220367406 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => DIE-GROUP PACKAGE HAVING A DEEP TRENCH DEVICE [patent_app_type] => utility [patent_app_number] => 17/700447 [patent_app_country] => US [patent_app_date] => 2022-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10628 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17700447 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/700447
Die-group package having a deep trench device Mar 20, 2022 Issued
Array ( [id] => 17676773 [patent_doc_number] => 20220189940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/687790 [patent_app_country] => US [patent_app_date] => 2022-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15127 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17687790 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/687790
Semiconductor devices Mar 6, 2022 Issued
Array ( [id] => 18514762 [patent_doc_number] => 20230231025 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-20 [patent_title] => Transistor Gate Contacts and Methods of Forming the Same [patent_app_type] => utility [patent_app_number] => 17/686055 [patent_app_country] => US [patent_app_date] => 2022-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17104 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17686055 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/686055
Transistor gate contacts and methods of forming the same Mar 2, 2022 Issued
Array ( [id] => 18600317 [patent_doc_number] => 20230275118 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => SHAPED METAL EDGE FOR GALVANIC OR CAPACITIVE ISOLATOR [patent_app_type] => utility [patent_app_number] => 17/683154 [patent_app_country] => US [patent_app_date] => 2022-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24793 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17683154 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/683154
Shaped metal edge for galvanic or capacitive isolator Feb 27, 2022 Issued
Array ( [id] => 18600206 [patent_doc_number] => 20230275007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => CONDUCTIVE MEMBERS ATOP SEMICONDUCTOR PACKAGES [patent_app_type] => utility [patent_app_number] => 17/683074 [patent_app_country] => US [patent_app_date] => 2022-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5551 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17683074 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/683074
Conductive members atop semiconductor packages Feb 27, 2022 Issued
Array ( [id] => 19582588 [patent_doc_number] => 12148716 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-19 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/679896 [patent_app_country] => US [patent_app_date] => 2022-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 22 [patent_no_of_words] => 6084 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17679896 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/679896
Semiconductor device Feb 23, 2022 Issued
Array ( [id] => 20244232 [patent_doc_number] => 12424564 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-23 [patent_title] => Semiconductor device having a shielding line for signal crosstalk suppression [patent_app_type] => utility [patent_app_number] => 17/679302 [patent_app_country] => US [patent_app_date] => 2022-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 2097 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17679302 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/679302
Semiconductor device having a shielding line for signal crosstalk suppression Feb 23, 2022 Issued
Array ( [id] => 19507901 [patent_doc_number] => 12119331 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Semiconductor package [patent_app_type] => utility [patent_app_number] => 17/677453 [patent_app_country] => US [patent_app_date] => 2022-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 8461 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 292 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17677453 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/677453
Semiconductor package Feb 21, 2022 Issued
Array ( [id] => 17645465 [patent_doc_number] => 20220173204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/676052 [patent_app_country] => US [patent_app_date] => 2022-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29496 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17676052 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/676052
Display device Feb 17, 2022 Issued
Array ( [id] => 18040017 [patent_doc_number] => 20220384234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => METHOD FOR TRANSFERRING ELECTRONIC ELEMENTS [patent_app_type] => utility [patent_app_number] => 17/671553 [patent_app_country] => US [patent_app_date] => 2022-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2805 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17671553 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/671553
METHOD FOR TRANSFERRING ELECTRONIC ELEMENTS Feb 13, 2022 Abandoned
Array ( [id] => 19552900 [patent_doc_number] => 12136613 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-05 [patent_title] => Chip package with near-die integrated passive device [patent_app_type] => utility [patent_app_number] => 17/669252 [patent_app_country] => US [patent_app_date] => 2022-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 7714 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17669252 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/669252
Chip package with near-die integrated passive device Feb 9, 2022 Issued
Array ( [id] => 19244511 [patent_doc_number] => 12014965 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-18 [patent_title] => Three-dimensional packaging structure and method for fan-out of bonding wall of device [patent_app_type] => utility [patent_app_number] => 17/666904 [patent_app_country] => US [patent_app_date] => 2022-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 3760 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17666904 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/666904
Three-dimensional packaging structure and method for fan-out of bonding wall of device Feb 7, 2022 Issued
Array ( [id] => 20161364 [patent_doc_number] => 12387999 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Planar integrated circuit package interconnects [patent_app_type] => utility [patent_app_number] => 17/592887 [patent_app_country] => US [patent_app_date] => 2022-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 1097 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17592887 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/592887
Planar integrated circuit package interconnects Feb 3, 2022 Issued
Array ( [id] => 19414829 [patent_doc_number] => 12080666 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-03 [patent_title] => Semiconductor storage device with bonding electrodes [patent_app_type] => utility [patent_app_number] => 17/665070 [patent_app_country] => US [patent_app_date] => 2022-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 26 [patent_no_of_words] => 11972 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17665070 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/665070
Semiconductor storage device with bonding electrodes Feb 3, 2022 Issued
Array ( [id] => 18364362 [patent_doc_number] => 20230145953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => REDUCTION OF CRACKS IN PASSIVATION LAYER [patent_app_type] => utility [patent_app_number] => 17/589500 [patent_app_country] => US [patent_app_date] => 2022-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8605 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17589500 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/589500
Reduction of cracks in passivation layer Jan 30, 2022 Issued
Array ( [id] => 18168969 [patent_doc_number] => 20230035580 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => INTERCONNECT STRUCTURE AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/583789 [patent_app_country] => US [patent_app_date] => 2022-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6749 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17583789 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/583789
Interconnect structure and methods of forming the same Jan 24, 2022 Issued
Array ( [id] => 17971390 [patent_doc_number] => 11488939 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => 3D semiconductor devices and structures with at least one vertical bus [patent_app_type] => utility [patent_app_number] => 17/581977 [patent_app_country] => US [patent_app_date] => 2022-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 57 [patent_no_of_words] => 18235 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17581977 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/581977
3D semiconductor devices and structures with at least one vertical bus Jan 23, 2022 Issued
Array ( [id] => 17986091 [patent_doc_number] => 20220352128 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => SEMICONDUCTOR PACKAGE INCLUDING A PLURALITY OF SEMICONDUCTOR CHIPS [patent_app_type] => utility [patent_app_number] => 17/648549 [patent_app_country] => US [patent_app_date] => 2022-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14330 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17648549 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/648549
Semiconductor package including a plurality of semiconductor chips Jan 20, 2022 Issued
Array ( [id] => 19294597 [patent_doc_number] => 12033961 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-09 [patent_title] => Semiconductor package including reinforcement pattern [patent_app_type] => utility [patent_app_number] => 17/575890 [patent_app_country] => US [patent_app_date] => 2022-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 7906 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17575890 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/575890
Semiconductor package including reinforcement pattern Jan 13, 2022 Issued
Array ( [id] => 19153774 [patent_doc_number] => 11978697 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => Package structure [patent_app_type] => utility [patent_app_number] => 17/575654 [patent_app_country] => US [patent_app_date] => 2022-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 21 [patent_no_of_words] => 10223 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17575654 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/575654
Package structure Jan 13, 2022 Issued
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