Search

Jack S. J. Chen

Examiner (ID: 8129, Phone: (571)272-1689 , Office: P/2893 )

Most Active Art Unit
2893
Art Unit(s)
2813, 2893
Total Applications
1826
Issued Applications
1467
Pending Applications
139
Abandoned Applications
265

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20230364 [patent_doc_number] => 12419029 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-16 [patent_title] => Semiconductor structure and forming method thereof [patent_app_type] => utility [patent_app_number] => 17/647816 [patent_app_country] => US [patent_app_date] => 2022-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 21 [patent_no_of_words] => 1153 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17647816 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/647816
Semiconductor structure and forming method thereof Jan 11, 2022 Issued
Array ( [id] => 17764860 [patent_doc_number] => 20220238473 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-28 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND CORRESPONDING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/573172 [patent_app_country] => US [patent_app_date] => 2022-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3611 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17573172 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/573172
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND CORRESPONDING SEMICONDUCTOR DEVICE Jan 10, 2022 Abandoned
Array ( [id] => 18482661 [patent_doc_number] => 11696430 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-04 [patent_title] => Two-port SRAM structure [patent_app_type] => utility [patent_app_number] => 17/647510 [patent_app_country] => US [patent_app_date] => 2022-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5216 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17647510 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/647510
Two-port SRAM structure Jan 9, 2022 Issued
Array ( [id] => 19153773 [patent_doc_number] => 11978696 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => Semiconductor package device [patent_app_type] => utility [patent_app_number] => 17/568465 [patent_app_country] => US [patent_app_date] => 2022-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6527 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17568465 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/568465
Semiconductor package device Jan 3, 2022 Issued
Array ( [id] => 19199129 [patent_doc_number] => 11996378 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-28 [patent_title] => Semiconductor package and method for manufacturing semiconductor package [patent_app_type] => utility [patent_app_number] => 17/646675 [patent_app_country] => US [patent_app_date] => 2021-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 8157 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17646675 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/646675
Semiconductor package and method for manufacturing semiconductor package Dec 29, 2021 Issued
Array ( [id] => 19873814 [patent_doc_number] => 12266685 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-01 [patent_title] => Method and device for using a semiconductor component [patent_app_type] => utility [patent_app_number] => 17/564645 [patent_app_country] => US [patent_app_date] => 2021-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 6929 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17564645 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/564645
Method and device for using a semiconductor component Dec 28, 2021 Issued
Array ( [id] => 18473235 [patent_doc_number] => 20230207523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => WAFER TO WAFER HIGH DENSITY INTERCONNECTS [patent_app_type] => utility [patent_app_number] => 17/564170 [patent_app_country] => US [patent_app_date] => 2021-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3399 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17564170 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/564170
WAFER TO WAFER HIGH DENSITY INTERCONNECTS Dec 27, 2021 Pending
Array ( [id] => 17723449 [patent_doc_number] => 20220216171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-07 [patent_title] => CHIP PACKAGE STRUCTURE, PREPARATION METHOD, AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/560583 [patent_app_country] => US [patent_app_date] => 2021-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8422 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17560583 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/560583
Chip package structure, preparation method, and electronic device Dec 22, 2021 Issued
Array ( [id] => 20201681 [patent_doc_number] => 12404450 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-02 [patent_title] => Photodetector element, manufacturing method for photodetector element, image sensor, dispersion liquid, and semiconductor film [patent_app_type] => utility [patent_app_number] => 17/555519 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 7381 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17555519 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/555519
Photodetector element, manufacturing method for photodetector element, image sensor, dispersion liquid, and semiconductor film Dec 19, 2021 Issued
Array ( [id] => 18704784 [patent_doc_number] => 11791301 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-17 [patent_title] => Chip package structure [patent_app_type] => utility [patent_app_number] => 17/554475 [patent_app_country] => US [patent_app_date] => 2021-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 32 [patent_no_of_words] => 13559 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17554475 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/554475
Chip package structure Dec 16, 2021 Issued
Array ( [id] => 17523141 [patent_doc_number] => 20220108990 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-07 [patent_title] => METHOD OF MAKING SEMICONDUCTOR DEVICE WHICH INCLUDES FINS [patent_app_type] => utility [patent_app_number] => 17/552433 [patent_app_country] => US [patent_app_date] => 2021-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12900 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17552433 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/552433
Method of making semiconductor device which includes Fins Dec 15, 2021 Issued
Array ( [id] => 17986024 [patent_doc_number] => 20220352061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 17/551938 [patent_app_country] => US [patent_app_date] => 2021-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8843 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17551938 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/551938
Semiconductor package Dec 14, 2021 Issued
Array ( [id] => 19720280 [patent_doc_number] => 12205823 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-21 [patent_title] => Method for producing element chips [patent_app_type] => utility [patent_app_number] => 17/550309 [patent_app_country] => US [patent_app_date] => 2021-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 8090 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17550309 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/550309
Method for producing element chips Dec 13, 2021 Issued
Array ( [id] => 18935515 [patent_doc_number] => 11887959 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-30 [patent_title] => Chip-on-lead semiconductor device, and corresponding method of manufacturing chip-on-lead semiconductor devices [patent_app_type] => utility [patent_app_number] => 17/549515 [patent_app_country] => US [patent_app_date] => 2021-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 5392 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17549515 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/549515
Chip-on-lead semiconductor device, and corresponding method of manufacturing chip-on-lead semiconductor devices Dec 12, 2021 Issued
Array ( [id] => 17738029 [patent_doc_number] => 20220223491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => SEMICONDUCTOR PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/545015 [patent_app_country] => US [patent_app_date] => 2021-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8930 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17545015 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/545015
Semiconductor package structure Dec 7, 2021 Issued
Array ( [id] => 19679469 [patent_doc_number] => 12191342 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-07 [patent_title] => Asymmetric 8-shaped inductor and corresponding switched capacitor array [patent_app_type] => utility [patent_app_number] => 17/544883 [patent_app_country] => US [patent_app_date] => 2021-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5352 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17544883 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/544883
Asymmetric 8-shaped inductor and corresponding switched capacitor array Dec 6, 2021 Issued
Array ( [id] => 18423980 [patent_doc_number] => 20230178444 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => SEMICONDUCTOR PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/542187 [patent_app_country] => US [patent_app_date] => 2021-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8382 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17542187 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/542187
Semiconductor package structure Dec 2, 2021 Issued
Array ( [id] => 19720207 [patent_doc_number] => 12205750 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-21 [patent_title] => 3D MIS-FO hybrid for embedded inductor package structure [patent_app_type] => utility [patent_app_number] => 17/538131 [patent_app_country] => US [patent_app_date] => 2021-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 34 [patent_no_of_words] => 2227 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17538131 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/538131
3D MIS-FO hybrid for embedded inductor package structure Nov 29, 2021 Issued
Array ( [id] => 17477470 [patent_doc_number] => 20220084974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => ELECTRONIC CIRCUIT DEVICE [patent_app_type] => utility [patent_app_number] => 17/534238 [patent_app_country] => US [patent_app_date] => 2021-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11315 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17534238 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/534238
Electronic circuit device Nov 22, 2021 Issued
Array ( [id] => 18579015 [patent_doc_number] => 11735555 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-22 [patent_title] => Manufacturing method of semiconductor structure [patent_app_type] => utility [patent_app_number] => 17/529275 [patent_app_country] => US [patent_app_date] => 2021-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5124 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17529275 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/529275
Manufacturing method of semiconductor structure Nov 17, 2021 Issued
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