Search

Jacob D. Knutson

Examiner (ID: 10549, Phone: (571)270-5576 , Office: P/3611 )

Most Active Art Unit
3611
Art Unit(s)
3611, 4114
Total Applications
1184
Issued Applications
895
Pending Applications
94
Abandoned Applications
223

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18688504 [patent_doc_number] => 11784250 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-10-10 [patent_title] => Devices and methods for compact radiation-hardened integrated circuits [patent_app_type] => utility [patent_app_number] => 18/163692 [patent_app_country] => US [patent_app_date] => 2023-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 11441 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 367 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18163692 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/163692
Devices and methods for compact radiation-hardened integrated circuits Feb 1, 2023 Issued
Array ( [id] => 18379909 [patent_doc_number] => 20230154998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/100302 [patent_app_country] => US [patent_app_date] => 2023-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9387 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18100302 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/100302
Semiconductor device and manufacturing method thereof Jan 22, 2023 Issued
Array ( [id] => 18458759 [patent_doc_number] => 20230200041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => MEMORY DEVICE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/154463 [patent_app_country] => US [patent_app_date] => 2023-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11043 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18154463 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/154463
Memory device and method for forming the same Jan 12, 2023 Issued
Array ( [id] => 19966770 [patent_doc_number] => 12336309 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-17 [patent_title] => Unit pixel of image sensor and light-receiving element thereof [patent_app_type] => utility [patent_app_number] => 18/093751 [patent_app_country] => US [patent_app_date] => 2023-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 1153 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18093751 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/093751
Unit pixel of image sensor and light-receiving element thereof Jan 4, 2023 Issued
Array ( [id] => 18514760 [patent_doc_number] => 20230231023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-20 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/085331 [patent_app_country] => US [patent_app_date] => 2022-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11027 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18085331 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/085331
SEMICONDUCTOR DEVICES Dec 19, 2022 Pending
Array ( [id] => 18456240 [patent_doc_number] => 20230197522 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => Method for Forming a Semiconductor Device [patent_app_type] => utility [patent_app_number] => 18/065130 [patent_app_country] => US [patent_app_date] => 2022-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9982 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 371 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18065130 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/065130
Method for Forming a Semiconductor Device Dec 12, 2022 Pending
Array ( [id] => 20360136 [patent_doc_number] => 12476141 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-18 [patent_title] => Fin field effect transistor (FinFET) device structure with interconnect structure [patent_app_type] => utility [patent_app_number] => 18/065184 [patent_app_country] => US [patent_app_date] => 2022-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 32 [patent_no_of_words] => 3041 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18065184 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/065184
Fin field effect transistor (FinFET) device structure with interconnect structure Dec 12, 2022 Issued
Array ( [id] => 18311863 [patent_doc_number] => 20230115763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => Gate Electrode Deposition and Structure Formed Thereby [patent_app_type] => utility [patent_app_number] => 18/079171 [patent_app_country] => US [patent_app_date] => 2022-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9330 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18079171 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/079171
Gate electrode deposition and structure formed thereby Dec 11, 2022 Issued
Array ( [id] => 18285134 [patent_doc_number] => 20230100606 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/075396 [patent_app_country] => US [patent_app_date] => 2022-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4585 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18075396 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/075396
Semiconductor device and method for fabricating the same Dec 4, 2022 Issued
Array ( [id] => 18283458 [patent_doc_number] => 20230098930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => SILICIDE BACKSIDE CONTACT [patent_app_type] => utility [patent_app_number] => 18/074317 [patent_app_country] => US [patent_app_date] => 2022-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9572 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18074317 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/074317
Silicide backside contact Dec 1, 2022 Issued
Array ( [id] => 18490284 [patent_doc_number] => 20230217638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/059044 [patent_app_country] => US [patent_app_date] => 2022-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9271 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18059044 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/059044
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME Nov 27, 2022 Pending
Array ( [id] => 20347617 [patent_doc_number] => 12471355 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-11 [patent_title] => Non-overlapping gate conductors for GAA transistors [patent_app_type] => utility [patent_app_number] => 18/070050 [patent_app_country] => US [patent_app_date] => 2022-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 1181 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18070050 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/070050
Non-overlapping gate conductors for GAA transistors Nov 27, 2022 Issued
Array ( [id] => 18285357 [patent_doc_number] => 20230100829 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => Circuit Systems And Methods Using Spacer Dies [patent_app_type] => utility [patent_app_number] => 18/070361 [patent_app_country] => US [patent_app_date] => 2022-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5699 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18070361 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/070361
Circuit Systems And Methods Using Spacer Dies Nov 27, 2022 Pending
Array ( [id] => 19966739 [patent_doc_number] => 12336278 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-17 [patent_title] => Gate-all-around integrated circuit structures having high mobility [patent_app_type] => utility [patent_app_number] => 18/070302 [patent_app_country] => US [patent_app_date] => 2022-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 30 [patent_no_of_words] => 10307 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18070302 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/070302
Gate-all-around integrated circuit structures having high mobility Nov 27, 2022 Issued
Array ( [id] => 18285662 [patent_doc_number] => 20230101134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => Selective Gate Air Spacer Formation [patent_app_type] => utility [patent_app_number] => 17/986451 [patent_app_country] => US [patent_app_date] => 2022-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9437 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17986451 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/986451
Selective gate air spacer formation Nov 13, 2022 Issued
Array ( [id] => 19176177 [patent_doc_number] => 20240162151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => BURIED POWER RAIL VIA WITH REDUCED ASPECT RATIO DISCREPANCY [patent_app_type] => utility [patent_app_number] => 18/054349 [patent_app_country] => US [patent_app_date] => 2022-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12886 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18054349 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/054349
BURIED POWER RAIL VIA WITH REDUCED ASPECT RATIO DISCREPANCY Nov 9, 2022 Pending
Array ( [id] => 18959212 [patent_doc_number] => 20240047539 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => 3D STACKED FIELD-EFFECT TRANSISTOR DEVICE WITH PN JUNCTION STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/984025 [patent_app_country] => US [patent_app_date] => 2022-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8172 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17984025 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/984025
3D STACKED FIELD-EFFECT TRANSISTOR DEVICE WITH PN JUNCTION STRUCTURE Nov 8, 2022 Pending
Array ( [id] => 19161168 [patent_doc_number] => 20240153875 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => BACKSIDE CONTACT METAL FILL [patent_app_type] => utility [patent_app_number] => 18/054133 [patent_app_country] => US [patent_app_date] => 2022-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8301 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18054133 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/054133
BACKSIDE CONTACT METAL FILL Nov 8, 2022 Pending
Array ( [id] => 18193236 [patent_doc_number] => 20230046755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => VERTICAL INTEGRATION SCHEME AND CIRCUIT ELEMENTS ARCHITECTURE FOR AREA SCALING OF SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/978038 [patent_app_country] => US [patent_app_date] => 2022-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15221 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17978038 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/978038
Vertical integration scheme and circuit elements architecture for area scaling of semiconductor devices Oct 30, 2022 Issued
Array ( [id] => 18163977 [patent_doc_number] => 20230030571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/962327 [patent_app_country] => US [patent_app_date] => 2022-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11952 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17962327 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/962327
Semiconductor device and manufacturing method thereof Oct 6, 2022 Issued
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