Search

Jacob D. Knutson

Examiner (ID: 10549, Phone: (571)270-5576 , Office: P/3611 )

Most Active Art Unit
3611
Art Unit(s)
3611, 4114
Total Applications
1184
Issued Applications
895
Pending Applications
94
Abandoned Applications
223

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17933233 [patent_doc_number] => 20220328359 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => SEMICONDUCTOR DEVICE AND FORMATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/375384 [patent_app_country] => US [patent_app_date] => 2021-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11409 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17375384 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/375384
Semiconductor device and formation method thereof Jul 13, 2021 Issued
Array ( [id] => 19123538 [patent_doc_number] => 11967532 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Gate spacers and methods of forming the same in semiconductor devices [patent_app_type] => utility [patent_app_number] => 17/370898 [patent_app_country] => US [patent_app_date] => 2021-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 6671 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17370898 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/370898
Gate spacers and methods of forming the same in semiconductor devices Jul 7, 2021 Issued
Array ( [id] => 19487419 [patent_doc_number] => 12107145 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-01 [patent_title] => Densified gate spacers and formation thereof [patent_app_type] => utility [patent_app_number] => 17/369693 [patent_app_country] => US [patent_app_date] => 2021-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 9534 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17369693 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/369693
Densified gate spacers and formation thereof Jul 6, 2021 Issued
Array ( [id] => 17900941 [patent_doc_number] => 20220310603 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/366530 [patent_app_country] => US [patent_app_date] => 2021-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21855 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17366530 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/366530
Semiconductor device and manufacturing method thereof Jul 1, 2021 Issued
Array ( [id] => 17583059 [patent_doc_number] => 20220139914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => Semiconductor Device with Gate Isolation Structure and Method for Forming the Same [patent_app_type] => utility [patent_app_number] => 17/364500 [patent_app_country] => US [patent_app_date] => 2021-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12709 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17364500 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/364500
Semiconductor device with gate isolation structure and method for forming the same Jun 29, 2021 Issued
Array ( [id] => 17174221 [patent_doc_number] => 20210327892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/360349 [patent_app_country] => US [patent_app_date] => 2021-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12847 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17360349 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/360349
Three-dimensional semiconductor memory devices Jun 27, 2021 Issued
Array ( [id] => 19123539 [patent_doc_number] => 11967533 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Semiconductor devices and methods of manufacturing thereof [patent_app_type] => utility [patent_app_number] => 17/355444 [patent_app_country] => US [patent_app_date] => 2021-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 11886 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17355444 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/355444
Semiconductor devices and methods of manufacturing thereof Jun 22, 2021 Issued
Array ( [id] => 18081049 [patent_doc_number] => 20220406661 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/352069 [patent_app_country] => US [patent_app_date] => 2021-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8010 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17352069 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/352069
Method of manufacturing a semiconductor device Jun 17, 2021 Issued
Array ( [id] => 18759879 [patent_doc_number] => 11810919 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-07 [patent_title] => Semiconductor device structure with conductive via structure and method for forming the same [patent_app_type] => utility [patent_app_number] => 17/350171 [patent_app_country] => US [patent_app_date] => 2021-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 7736 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17350171 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/350171
Semiconductor device structure with conductive via structure and method for forming the same Jun 16, 2021 Issued
Array ( [id] => 18670143 [patent_doc_number] => 11777055 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-03 [patent_title] => Light emitting device [patent_app_type] => utility [patent_app_number] => 17/349183 [patent_app_country] => US [patent_app_date] => 2021-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 6917 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17349183 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/349183
Light emitting device Jun 15, 2021 Issued
Array ( [id] => 17130330 [patent_doc_number] => 20210305099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => Integrated Circuit Devices with Well Regions and Methods for Forming the Same [patent_app_type] => utility [patent_app_number] => 17/345659 [patent_app_country] => US [patent_app_date] => 2021-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4994 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17345659 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/345659
Integrated circuit devices with well regions and methods for forming the same Jun 10, 2021 Issued
Array ( [id] => 19341441 [patent_doc_number] => 12051638 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-30 [patent_title] => Integrated high efficiency transistor cooling [patent_app_type] => utility [patent_app_number] => 17/344231 [patent_app_country] => US [patent_app_date] => 2021-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 3593 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17344231 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/344231
Integrated high efficiency transistor cooling Jun 9, 2021 Issued
Array ( [id] => 17115873 [patent_doc_number] => 20210296470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => SEMICONDUCTOR DEVICE LAYOUT STRUCTURE MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 17/303879 [patent_app_country] => US [patent_app_date] => 2021-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6315 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17303879 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/303879
Semiconductor device layout structure manufacturing method Jun 8, 2021 Issued
Array ( [id] => 19093904 [patent_doc_number] => 11955369 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-09 [patent_title] => Recessed local interconnect formed over self-aligned double diffusion break [patent_app_type] => utility [patent_app_number] => 17/341640 [patent_app_country] => US [patent_app_date] => 2021-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 3963 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17341640 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/341640
Recessed local interconnect formed over self-aligned double diffusion break Jun 7, 2021 Issued
Array ( [id] => 19168564 [patent_doc_number] => 11984478 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-14 [patent_title] => Forming source and drain features in semiconductor devices [patent_app_type] => utility [patent_app_number] => 17/341745 [patent_app_country] => US [patent_app_date] => 2021-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 58 [patent_no_of_words] => 11977 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17341745 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/341745
Forming source and drain features in semiconductor devices Jun 7, 2021 Issued
Array ( [id] => 17115853 [patent_doc_number] => 20210296450 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => SEMICONDUCTOR DEVICE AND METHODS OF MANUFACTURE [patent_app_type] => utility [patent_app_number] => 17/340802 [patent_app_country] => US [patent_app_date] => 2021-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6469 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17340802 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/340802
Semiconductor device and methods of manufacture Jun 6, 2021 Issued
Array ( [id] => 17949565 [patent_doc_number] => 20220336584 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => NANOSHEET FIELD-EFFECT TRANSISTOR DEVICE AND METHOD OF FORMING [patent_app_type] => utility [patent_app_number] => 17/341034 [patent_app_country] => US [patent_app_date] => 2021-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10109 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17341034 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/341034
Nanosheet field-effect transistor device and method of forming Jun 6, 2021 Issued
Array ( [id] => 18721586 [patent_doc_number] => 11798943 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-24 [patent_title] => Transistor source/drain contacts and methods of forming the same [patent_app_type] => utility [patent_app_number] => 17/339452 [patent_app_country] => US [patent_app_date] => 2021-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 40 [patent_no_of_words] => 11465 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17339452 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/339452
Transistor source/drain contacts and methods of forming the same Jun 3, 2021 Issued
Array ( [id] => 19328974 [patent_doc_number] => 12046666 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-23 [patent_title] => Gallium nitride (GaN) based transistor with multiple p-GaN blocks [patent_app_type] => utility [patent_app_number] => 17/330012 [patent_app_country] => US [patent_app_date] => 2021-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 7281 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17330012 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/330012
Gallium nitride (GaN) based transistor with multiple p-GaN blocks May 24, 2021 Issued
Array ( [id] => 19277450 [patent_doc_number] => 12027583 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-02 [patent_title] => Gate structures for semiconductor devices [patent_app_type] => utility [patent_app_number] => 17/320170 [patent_app_country] => US [patent_app_date] => 2021-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 44 [patent_no_of_words] => 7371 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17320170 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/320170
Gate structures for semiconductor devices May 12, 2021 Issued
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