Search

Jacqueline V. Howard

Examiner (ID: 13731)

Most Active Art Unit
1108
Art Unit(s)
1111, 1106, 1721, 1101, 1109, 1505, 1764, 1107, 2899, 1108
Total Applications
2212
Issued Applications
1851
Pending Applications
77
Abandoned Applications
284

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2885968 [patent_doc_number] => 05185724 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-02-09 [patent_title] => 'Image memory' [patent_app_type] => 1 [patent_app_number] => 7/586232 [patent_app_country] => US [patent_app_date] => 1990-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 5339 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/185/05185724.pdf [firstpage_image] =>[orig_patent_app_number] => 586232 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/586232
Image memory Sep 20, 1990 Issued
Array ( [id] => 2813488 [patent_doc_number] => 05124950 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-23 [patent_title] => 'Multi-port semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 7/585891 [patent_app_country] => US [patent_app_date] => 1990-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8656 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 354 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/124/05124950.pdf [firstpage_image] =>[orig_patent_app_number] => 585891 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/585891
Multi-port semiconductor memory Sep 19, 1990 Issued
Array ( [id] => 2879974 [patent_doc_number] => 05153853 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-06 [patent_title] => 'Method and apparatus for measuring EEPROM threshold voltages in a nonvolatile DRAM memory device' [patent_app_type] => 1 [patent_app_number] => 7/585772 [patent_app_country] => US [patent_app_date] => 1990-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5633 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/153/05153853.pdf [firstpage_image] =>[orig_patent_app_number] => 585772 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/585772
Method and apparatus for measuring EEPROM threshold voltages in a nonvolatile DRAM memory device Sep 19, 1990 Issued
Array ( [id] => 2814297 [patent_doc_number] => 05146431 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-08 [patent_title] => 'Method and apparatus for page recall of data in an nonvolatile DRAM memory device' [patent_app_type] => 1 [patent_app_number] => 7/585771 [patent_app_country] => US [patent_app_date] => 1990-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3559 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/146/05146431.pdf [firstpage_image] =>[orig_patent_app_number] => 585771 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/585771
Method and apparatus for page recall of data in an nonvolatile DRAM memory device Sep 19, 1990 Issued
Array ( [id] => 2830394 [patent_doc_number] => 05168462 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-01 [patent_title] => 'Sense amplifier having reduced coupling noise' [patent_app_type] => 1 [patent_app_number] => 7/585703 [patent_app_country] => US [patent_app_date] => 1990-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1876 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/168/05168462.pdf [firstpage_image] =>[orig_patent_app_number] => 585703 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/585703
Sense amplifier having reduced coupling noise Sep 19, 1990 Issued
Array ( [id] => 2830735 [patent_doc_number] => 05173876 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-22 [patent_title] => 'Electrically erasable and programmable non-volatile semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 7/584673 [patent_app_country] => US [patent_app_date] => 1990-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 8 [patent_no_of_words] => 12769 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/173/05173876.pdf [firstpage_image] =>[orig_patent_app_number] => 584673 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/584673
Electrically erasable and programmable non-volatile semiconductor memory device Sep 18, 1990 Issued
Array ( [id] => 2794568 [patent_doc_number] => 05093808 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-03-03 [patent_title] => 'Folded bitline dynamic RAM with reduced shared supply voltages' [patent_app_type] => 1 [patent_app_number] => 7/585714 [patent_app_country] => US [patent_app_date] => 1990-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3284 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/093/05093808.pdf [firstpage_image] =>[orig_patent_app_number] => 585714 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/585714
Folded bitline dynamic RAM with reduced shared supply voltages Sep 18, 1990 Issued
Array ( [id] => 2830490 [patent_doc_number] => 05168467 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-01 [patent_title] => 'Semiconductor memory device having sense amplifier protection' [patent_app_type] => 1 [patent_app_number] => 7/584342 [patent_app_country] => US [patent_app_date] => 1990-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5568 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/168/05168467.pdf [firstpage_image] =>[orig_patent_app_number] => 584342 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/584342
Semiconductor memory device having sense amplifier protection Sep 17, 1990 Issued
Array ( [id] => 2945060 [patent_doc_number] => 05247476 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-09-21 [patent_title] => 'Semiconductor memory device having a mask ROM and a PROM' [patent_app_type] => 1 [patent_app_number] => 7/584312 [patent_app_country] => US [patent_app_date] => 1990-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 4939 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/247/05247476.pdf [firstpage_image] =>[orig_patent_app_number] => 584312 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/584312
Semiconductor memory device having a mask ROM and a PROM Sep 17, 1990 Issued
Array ( [id] => 2983539 [patent_doc_number] => 05195057 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-03-16 [patent_title] => 'Semiconductor memory device having a redundant memory which can be selectively placed in a not-in-use status' [patent_app_type] => 1 [patent_app_number] => 7/584311 [patent_app_country] => US [patent_app_date] => 1990-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4815 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/195/05195057.pdf [firstpage_image] =>[orig_patent_app_number] => 584311 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/584311
Semiconductor memory device having a redundant memory which can be selectively placed in a not-in-use status Sep 17, 1990 Issued
07/583521 HIERARCHICAL MULTI-DATA LINES DRAM ARRAY ARCHITECTURE Sep 16, 1990 Abandoned
Array ( [id] => 2810428 [patent_doc_number] => 05140557 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-08-18 [patent_title] => 'Static random access memory of an energy-saving type' [patent_app_type] => 1 [patent_app_number] => 7/580385 [patent_app_country] => US [patent_app_date] => 1990-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1660 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/140/05140557.pdf [firstpage_image] =>[orig_patent_app_number] => 580385 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/580385
Static random access memory of an energy-saving type Sep 10, 1990 Issued
Array ( [id] => 2983453 [patent_doc_number] => 05182724 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-01-26 [patent_title] => 'Information processing method and information processing device' [patent_app_type] => 1 [patent_app_number] => 7/579041 [patent_app_country] => US [patent_app_date] => 1990-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 12042 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/182/05182724.pdf [firstpage_image] =>[orig_patent_app_number] => 579041 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/579041
Information processing method and information processing device Sep 6, 1990 Issued
Array ( [id] => 2813411 [patent_doc_number] => 05124946 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-23 [patent_title] => 'Semiconductor memory device associated with peripheral logic gates having a scan-path diagnostic mode of operation' [patent_app_type] => 1 [patent_app_number] => 7/578111 [patent_app_country] => US [patent_app_date] => 1990-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3044 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/124/05124946.pdf [firstpage_image] =>[orig_patent_app_number] => 578111 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/578111
Semiconductor memory device associated with peripheral logic gates having a scan-path diagnostic mode of operation Sep 5, 1990 Issued
Array ( [id] => 2854119 [patent_doc_number] => 05138581 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-08-11 [patent_title] => 'Multiport memory' [patent_app_type] => 1 [patent_app_number] => 7/577361 [patent_app_country] => US [patent_app_date] => 1990-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1622 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/138/05138581.pdf [firstpage_image] =>[orig_patent_app_number] => 577361 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/577361
Multiport memory Sep 4, 1990 Issued
Array ( [id] => 2905322 [patent_doc_number] => 05184325 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-02-02 [patent_title] => 'Dynamic associative memory with logic-in-refresh' [patent_app_type] => 1 [patent_app_number] => 7/577991 [patent_app_country] => US [patent_app_date] => 1990-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 5304 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/184/05184325.pdf [firstpage_image] =>[orig_patent_app_number] => 577991 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/577991
Dynamic associative memory with logic-in-refresh Sep 4, 1990 Issued
Array ( [id] => 2889044 [patent_doc_number] => 05119331 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-02 [patent_title] => 'Segmented flash write' [patent_app_type] => 1 [patent_app_number] => 7/576745 [patent_app_country] => US [patent_app_date] => 1990-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2934 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/119/05119331.pdf [firstpage_image] =>[orig_patent_app_number] => 576745 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/576745
Segmented flash write Sep 3, 1990 Issued
Array ( [id] => 2810373 [patent_doc_number] => 05140554 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-08-18 [patent_title] => 'Integrated circuit fuse-link tester and test method' [patent_app_type] => 1 [patent_app_number] => 7/574835 [patent_app_country] => US [patent_app_date] => 1990-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3533 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/140/05140554.pdf [firstpage_image] =>[orig_patent_app_number] => 574835 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/574835
Integrated circuit fuse-link tester and test method Aug 29, 1990 Issued
Array ( [id] => 2793395 [patent_doc_number] => 05164918 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-11-17 [patent_title] => 'Integrated circuit' [patent_app_type] => 1 [patent_app_number] => 7/574153 [patent_app_country] => US [patent_app_date] => 1990-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3177 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/164/05164918.pdf [firstpage_image] =>[orig_patent_app_number] => 574153 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/574153
Integrated circuit Aug 28, 1990 Issued
Array ( [id] => 2785744 [patent_doc_number] => 05132931 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-21 [patent_title] => 'Sense enable timing circuit for a random access memory' [patent_app_type] => 1 [patent_app_number] => 7/574201 [patent_app_country] => US [patent_app_date] => 1990-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 5018 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/132/05132931.pdf [firstpage_image] =>[orig_patent_app_number] => 574201 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/574201
Sense enable timing circuit for a random access memory Aug 27, 1990 Issued
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