Search

Jacqueline V. Howard

Examiner (ID: 13731)

Most Active Art Unit
1108
Art Unit(s)
1111, 1106, 1721, 1101, 1109, 1505, 1764, 1107, 2899, 1108
Total Applications
2212
Issued Applications
1851
Pending Applications
77
Abandoned Applications
284

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3822481 [patent_doc_number] => 05710737 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-20 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/652035 [patent_app_country] => US [patent_app_date] => 1996-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 8708 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/710/05710737.pdf [firstpage_image] =>[orig_patent_app_number] => 652035 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/652035
Semiconductor memory device May 22, 1996 Issued
Array ( [id] => 3789223 [patent_doc_number] => 05808943 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-15 [patent_title] => 'Semiconductor memory and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 8/642357 [patent_app_country] => US [patent_app_date] => 1996-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 32 [patent_no_of_words] => 7748 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/808/05808943.pdf [firstpage_image] =>[orig_patent_app_number] => 642357 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/642357
Semiconductor memory and method of manufacturing the same May 2, 1996 Issued
Array ( [id] => 3715897 [patent_doc_number] => 05654924 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-05 [patent_title] => 'Semiconductor memory device capable of operating with potentials of adjacent bit lines inverted during multi-bit test' [patent_app_type] => 1 [patent_app_number] => 8/640639 [patent_app_country] => US [patent_app_date] => 1996-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 13193 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/654/05654924.pdf [firstpage_image] =>[orig_patent_app_number] => 640639 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/640639
Semiconductor memory device capable of operating with potentials of adjacent bit lines inverted during multi-bit test Apr 30, 1996 Issued
Array ( [id] => 3638692 [patent_doc_number] => 05687112 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-11 [patent_title] => 'Multibit single cell memory element having tapered contact' [patent_app_type] => 1 [patent_app_number] => 8/635442 [patent_app_country] => US [patent_app_date] => 1996-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 12897 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/687/05687112.pdf [firstpage_image] =>[orig_patent_app_number] => 635442 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/635442
Multibit single cell memory element having tapered contact Apr 18, 1996 Issued
Array ( [id] => 3698186 [patent_doc_number] => 05691953 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-25 [patent_title] => 'Address buffer for high speed static random-access-memory devices' [patent_app_type] => 1 [patent_app_number] => 8/629641 [patent_app_country] => US [patent_app_date] => 1996-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2011 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/691/05691953.pdf [firstpage_image] =>[orig_patent_app_number] => 629641 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/629641
Address buffer for high speed static random-access-memory devices Apr 8, 1996 Issued
08/616417 SEMICONDUCTOR MEMORY DEVICE HAVING POWER LINE ARRANGED IN A MESHED SHAPE Mar 14, 1996 Abandoned
Array ( [id] => 3852163 [patent_doc_number] => 05708622 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-13 [patent_title] => 'Clock synchronous semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/647431 [patent_app_country] => US [patent_app_date] => 1996-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 64 [patent_figures_cnt] => 77 [patent_no_of_words] => 47749 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/708/05708622.pdf [firstpage_image] =>[orig_patent_app_number] => 647431 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/647431
Clock synchronous semiconductor memory device Mar 13, 1996 Issued
Array ( [id] => 3741103 [patent_doc_number] => 05666323 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-09 [patent_title] => 'Synchronous NAND DRAM architecture' [patent_app_type] => 1 [patent_app_number] => 8/615527 [patent_app_country] => US [patent_app_date] => 1996-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3213 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/666/05666323.pdf [firstpage_image] =>[orig_patent_app_number] => 615527 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/615527
Synchronous NAND DRAM architecture Mar 10, 1996 Issued
Array ( [id] => 3674226 [patent_doc_number] => 05668758 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-16 [patent_title] => 'Decoded wordline driver with positive and negative voltage modes' [patent_app_type] => 1 [patent_app_number] => 8/612923 [patent_app_country] => US [patent_app_date] => 1996-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6417 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/668/05668758.pdf [firstpage_image] =>[orig_patent_app_number] => 612923 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/612923
Decoded wordline driver with positive and negative voltage modes Mar 4, 1996 Issued
Array ( [id] => 3867596 [patent_doc_number] => 05706228 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-06 [patent_title] => 'Method for operating a memory array' [patent_app_type] => 1 [patent_app_number] => 8/603939 [patent_app_country] => US [patent_app_date] => 1996-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2761 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/706/05706228.pdf [firstpage_image] =>[orig_patent_app_number] => 603939 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/603939
Method for operating a memory array Feb 19, 1996 Issued
Array ( [id] => 3851816 [patent_doc_number] => 05708601 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-13 [patent_title] => 'Integrated circuitry for checking the utilization rate of redundancy memory elements in a semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/602237 [patent_app_country] => US [patent_app_date] => 1996-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 6038 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/708/05708601.pdf [firstpage_image] =>[orig_patent_app_number] => 602237 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/602237
Integrated circuitry for checking the utilization rate of redundancy memory elements in a semiconductor memory device Feb 15, 1996 Issued
Array ( [id] => 3866747 [patent_doc_number] => 05768184 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-16 [patent_title] => 'Performance non-volatile semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/594437 [patent_app_country] => US [patent_app_date] => 1996-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 8792 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/768/05768184.pdf [firstpage_image] =>[orig_patent_app_number] => 594437 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/594437
Performance non-volatile semiconductor memory device Jan 30, 1996 Issued
Array ( [id] => 3698065 [patent_doc_number] => 05663926 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-02 [patent_title] => 'Semiconductor device having an internal voltage step-up control circuit' [patent_app_type] => 1 [patent_app_number] => 8/594239 [patent_app_country] => US [patent_app_date] => 1996-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 5305 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/663/05663926.pdf [firstpage_image] =>[orig_patent_app_number] => 594239 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/594239
Semiconductor device having an internal voltage step-up control circuit Jan 29, 1996 Issued
Array ( [id] => 3733024 [patent_doc_number] => 05673221 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-30 [patent_title] => 'Circuit and method for reading a memory cell that can store multiple bits of data' [patent_app_type] => 1 [patent_app_number] => 8/592939 [patent_app_country] => US [patent_app_date] => 1996-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 5163 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/673/05673221.pdf [firstpage_image] =>[orig_patent_app_number] => 592939 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/592939
Circuit and method for reading a memory cell that can store multiple bits of data Jan 28, 1996 Issued
Array ( [id] => 3843820 [patent_doc_number] => 05740111 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-14 [patent_title] => 'Charge pump disablement apparatus' [patent_app_type] => 1 [patent_app_number] => 8/590935 [patent_app_country] => US [patent_app_date] => 1996-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1207 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/740/05740111.pdf [firstpage_image] =>[orig_patent_app_number] => 590935 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/590935
Charge pump disablement apparatus Jan 23, 1996 Issued
Array ( [id] => 3741959 [patent_doc_number] => 05694360 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-02 [patent_title] => 'Write to flash EEPROM built in microcomputer' [patent_app_type] => 1 [patent_app_number] => 8/589909 [patent_app_country] => US [patent_app_date] => 1996-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2538 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/694/05694360.pdf [firstpage_image] =>[orig_patent_app_number] => 589909 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/589909
Write to flash EEPROM built in microcomputer Jan 22, 1996 Issued
Array ( [id] => 3712852 [patent_doc_number] => 05675535 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-07 [patent_title] => 'Sense amplifier having a high operation speed and a low power consumption' [patent_app_type] => 1 [patent_app_number] => 8/590342 [patent_app_country] => US [patent_app_date] => 1996-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 8641 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 327 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/675/05675535.pdf [firstpage_image] =>[orig_patent_app_number] => 590342 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/590342
Sense amplifier having a high operation speed and a low power consumption Jan 22, 1996 Issued
Array ( [id] => 3822437 [patent_doc_number] => 05710734 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-20 [patent_title] => 'Semiconductor memory device and data writing method thereof' [patent_app_type] => 1 [patent_app_number] => 8/589536 [patent_app_country] => US [patent_app_date] => 1996-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1941 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/710/05710734.pdf [firstpage_image] =>[orig_patent_app_number] => 589536 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/589536
Semiconductor memory device and data writing method thereof Jan 21, 1996 Issued
08/589139 CIRCUIT AND METHOD FOR TRACKING THE START OF A WRITE TO A MEMORY CELL Jan 18, 1996 Abandoned
Array ( [id] => 3698130 [patent_doc_number] => 05691950 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-25 [patent_title] => 'Device and method for isolating bit lines from a data line' [patent_app_type] => 1 [patent_app_number] => 8/588740 [patent_app_country] => US [patent_app_date] => 1996-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 13030 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/691/05691950.pdf [firstpage_image] =>[orig_patent_app_number] => 588740 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/588740
Device and method for isolating bit lines from a data line Jan 18, 1996 Issued
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