Search

Jae Lee

Examiner (ID: 1955, Phone: (571)270-1224 , Office: P/2899 )

Most Active Art Unit
2899
Art Unit(s)
2895, 2823, 2899
Total Applications
951
Issued Applications
742
Pending Applications
2
Abandoned Applications
207

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8629772 [patent_doc_number] => 08361844 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-29 [patent_title] => 'Method for adjusting the height of a gate electrode in a semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/754359 [patent_app_country] => US [patent_app_date] => 2010-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 7994 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12754359 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/754359
Method for adjusting the height of a gate electrode in a semiconductor device Apr 4, 2010 Issued
Array ( [id] => 6419216 [patent_doc_number] => 20100167500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-01 [patent_title] => 'METHOD OF RECYCLING AN EPITAXIED DONOR WAFER' [patent_app_type] => utility [patent_app_number] => 12/718804 [patent_app_country] => US [patent_app_date] => 2010-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6317 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0167/20100167500.pdf [firstpage_image] =>[orig_patent_app_number] => 12718804 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/718804
METHOD OF RECYCLING AN EPITAXIED DONOR WAFER Mar 4, 2010 Abandoned
Array ( [id] => 6426873 [patent_doc_number] => 20100151595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-17 [patent_title] => 'MAGNETIC RAM' [patent_app_type] => utility [patent_app_number] => 12/709602 [patent_app_country] => US [patent_app_date] => 2010-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3755 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20100151595.pdf [firstpage_image] =>[orig_patent_app_number] => 12709602 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/709602
Magnetic RAM Feb 21, 2010 Issued
Array ( [id] => 8555006 [patent_doc_number] => 08329478 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-11 [patent_title] => 'Magnetic tunnel junction device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/707047 [patent_app_country] => US [patent_app_date] => 2010-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5981 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12707047 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/707047
Magnetic tunnel junction device and method for manufacturing the same Feb 16, 2010 Issued
Array ( [id] => 6293175 [patent_doc_number] => 20100159682 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-24 [patent_title] => 'Method of removing photoresist' [patent_app_type] => utility [patent_app_number] => 12/707602 [patent_app_country] => US [patent_app_date] => 2010-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9813 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20100159682.pdf [firstpage_image] =>[orig_patent_app_number] => 12707602 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/707602
Method of removing photoresist Feb 16, 2010 Issued
Array ( [id] => 6285805 [patent_doc_number] => 20100237319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/707136 [patent_app_country] => US [patent_app_date] => 2010-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5683 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20100237319.pdf [firstpage_image] =>[orig_patent_app_number] => 12707136 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/707136
Nonvolatile semiconductor memory device Feb 16, 2010 Issued
Array ( [id] => 6470630 [patent_doc_number] => 20100207186 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-19 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/706195 [patent_app_country] => US [patent_app_date] => 2010-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 14824 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20100207186.pdf [firstpage_image] =>[orig_patent_app_number] => 12706195 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/706195
Nonvolatile semiconductor memory device and method of manufacturing the same Feb 15, 2010 Issued
Array ( [id] => 6470317 [patent_doc_number] => 20100207156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-19 [patent_title] => 'Light emitting device package' [patent_app_type] => utility [patent_app_number] => 12/656740 [patent_app_country] => US [patent_app_date] => 2010-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5774 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20100207156.pdf [firstpage_image] =>[orig_patent_app_number] => 12656740 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/656740
Light emitting device package Feb 15, 2010 Issued
Array ( [id] => 6446496 [patent_doc_number] => 20100283139 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-11 [patent_title] => 'Semiconductor Device Package Having Chip With Conductive Layer' [patent_app_type] => utility [patent_app_number] => 12/706394 [patent_app_country] => US [patent_app_date] => 2010-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2702 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0283/20100283139.pdf [firstpage_image] =>[orig_patent_app_number] => 12706394 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/706394
Semiconductor Device Package Having Chip With Conductive Layer Feb 15, 2010 Abandoned
Array ( [id] => 11286486 [patent_doc_number] => 09502345 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-22 [patent_title] => 'Ball-grid-array package, electronic system and method of manufacture' [patent_app_type] => utility [patent_app_number] => 12/705846 [patent_app_country] => US [patent_app_date] => 2010-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 39 [patent_no_of_words] => 14677 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12705846 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/705846
Ball-grid-array package, electronic system and method of manufacture Feb 14, 2010 Issued
Array ( [id] => 9923428 [patent_doc_number] => 08981397 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-17 [patent_title] => 'Light-emitting devices on textured substrates' [patent_app_type] => utility [patent_app_number] => 12/704997 [patent_app_country] => US [patent_app_date] => 2010-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2662 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12704997 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/704997
Light-emitting devices on textured substrates Feb 11, 2010 Issued
Array ( [id] => 6331265 [patent_doc_number] => 20100327976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'INTEGRATED POWER AMPLIFIER WITH LOAD INDUCTOR LOCATED UNDER IC DIE' [patent_app_type] => utility [patent_app_number] => 12/705493 [patent_app_country] => US [patent_app_date] => 2010-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6984 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0327/20100327976.pdf [firstpage_image] =>[orig_patent_app_number] => 12705493 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/705493
Integrated power amplifier with load inductor located under IC die Feb 11, 2010 Issued
Array ( [id] => 6058854 [patent_doc_number] => 20110198678 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-18 [patent_title] => 'ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/705339 [patent_app_country] => US [patent_app_date] => 2010-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3368 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20110198678.pdf [firstpage_image] =>[orig_patent_app_number] => 12705339 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/705339
Electrostatic discharge protection circuit Feb 11, 2010 Issued
Array ( [id] => 8797601 [patent_doc_number] => 08436472 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-07 [patent_title] => 'Corner stress release structure design for increasing circuit routing areas' [patent_app_type] => utility [patent_app_number] => 12/702831 [patent_app_country] => US [patent_app_date] => 2010-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 2770 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12702831 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/702831
Corner stress release structure design for increasing circuit routing areas Feb 8, 2010 Issued
Array ( [id] => 10883058 [patent_doc_number] => 08907441 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-09 [patent_title] => 'Methods for double-patterning-compliant standard cell design' [patent_app_type] => utility [patent_app_number] => 12/702885 [patent_app_country] => US [patent_app_date] => 2010-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 20 [patent_no_of_words] => 3815 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12702885 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/702885
Methods for double-patterning-compliant standard cell design Feb 8, 2010 Issued
Array ( [id] => 8591802 [patent_doc_number] => 08349678 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-08 [patent_title] => 'Laterally diffused metal oxide semiconductor transistor with partially unsilicided source/drain' [patent_app_type] => utility [patent_app_number] => 12/701824 [patent_app_country] => US [patent_app_date] => 2010-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2617 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12701824 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/701824
Laterally diffused metal oxide semiconductor transistor with partially unsilicided source/drain Feb 7, 2010 Issued
Array ( [id] => 6161388 [patent_doc_number] => 20110193212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'Systems and Methods Providing Arrangements of Vias' [patent_app_type] => utility [patent_app_number] => 12/701642 [patent_app_country] => US [patent_app_date] => 2010-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4685 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20110193212.pdf [firstpage_image] =>[orig_patent_app_number] => 12701642 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/701642
Systems and Methods Providing Arrangements of Vias Feb 7, 2010 Abandoned
Array ( [id] => 8538759 [patent_doc_number] => 08314480 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-20 [patent_title] => 'Stackable semiconductor package with embedded die in pre-molded carrier frame' [patent_app_type] => utility [patent_app_number] => 12/701773 [patent_app_country] => US [patent_app_date] => 2010-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4235 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12701773 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/701773
Stackable semiconductor package with embedded die in pre-molded carrier frame Feb 7, 2010 Issued
Array ( [id] => 6161413 [patent_doc_number] => 20110193226 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'MICROELECTRONIC DEVICES WITH THROUGH-SUBSTRATE INTERCONNECTS AND ASSOCIATED METHODS OF MANUFACTURING' [patent_app_type] => utility [patent_app_number] => 12/701800 [patent_app_country] => US [patent_app_date] => 2010-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5556 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20110193226.pdf [firstpage_image] =>[orig_patent_app_number] => 12701800 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/701800
Microelectronic devices with through-substrate interconnects and associated methods of manufacturing Feb 7, 2010 Issued
Array ( [id] => 5925243 [patent_doc_number] => 20110037093 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-17 [patent_title] => 'LIGHT-EMITTING ELEMENT AND LIGHT-EMITTING ELEMENT FABRICATION METHOD' [patent_app_type] => utility [patent_app_number] => 12/701743 [patent_app_country] => US [patent_app_date] => 2010-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4172 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20110037093.pdf [firstpage_image] =>[orig_patent_app_number] => 12701743 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/701743
Light-emitting element and light-emitting element fabrication method Feb 7, 2010 Issued
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