Search

Jae Lee

Examiner (ID: 1955, Phone: (571)270-1224 , Office: P/2899 )

Most Active Art Unit
2899
Art Unit(s)
2895, 2823, 2899
Total Applications
951
Issued Applications
742
Pending Applications
2
Abandoned Applications
207

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5465162 [patent_doc_number] => 20090325362 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-31 [patent_title] => 'METHOD OF RECYCLING AN EPITAXIED DONOR WAFER' [patent_app_type] => utility [patent_app_number] => 12/503537 [patent_app_country] => US [patent_app_date] => 2009-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6299 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0325/20090325362.pdf [firstpage_image] =>[orig_patent_app_number] => 12503537 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/503537
METHOD OF RECYCLING AN EPITAXIED DONOR WAFER Jul 14, 2009 Abandoned
Array ( [id] => 8690511 [patent_doc_number] => 08390040 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-05 [patent_title] => 'Localized spacer for a multi-gate transistor' [patent_app_type] => utility [patent_app_number] => 12/500655 [patent_app_country] => US [patent_app_date] => 2009-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1460 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12500655 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/500655
Localized spacer for a multi-gate transistor Jul 9, 2009 Issued
Array ( [id] => 6372536 [patent_doc_number] => 20100300743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-02 [patent_title] => 'Modified Pillar Design for Improved Flip Chip Packaging' [patent_app_type] => utility [patent_app_number] => 12/476928 [patent_app_country] => US [patent_app_date] => 2009-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2981 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0300/20100300743.pdf [firstpage_image] =>[orig_patent_app_number] => 12476928 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/476928
Modified Pillar Design for Improved Flip Chip Packaging Jun 1, 2009 Abandoned
Array ( [id] => 5488289 [patent_doc_number] => 20090289360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-26 [patent_title] => 'WORKPIECE CONTACT PADS WITH ELEVATED RING FOR RESTRICTING HORIZONTAL MOVEMENT OF TERMINALS OF IC DURING PRESSING' [patent_app_type] => utility [patent_app_number] => 12/470004 [patent_app_country] => US [patent_app_date] => 2009-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3245 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0289/20090289360.pdf [firstpage_image] =>[orig_patent_app_number] => 12470004 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/470004
WORKPIECE CONTACT PADS WITH ELEVATED RING FOR RESTRICTING HORIZONTAL MOVEMENT OF TERMINALS OF IC DURING PRESSING May 20, 2009 Abandoned
Array ( [id] => 6336917 [patent_doc_number] => 20100019386 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-28 [patent_title] => 'ELECTRICAL CONDUCTOR LINE HAVING A MULTILAYER DIFFUSION BARRIER FOR USE IN A SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/469883 [patent_app_country] => US [patent_app_date] => 2009-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3701 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20100019386.pdf [firstpage_image] =>[orig_patent_app_number] => 12469883 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/469883
ELECTRICAL CONDUCTOR LINE HAVING A MULTILAYER DIFFUSION BARRIER FOR USE IN A SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME May 20, 2009 Abandoned
Array ( [id] => 8549138 [patent_doc_number] => 08324019 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-04 [patent_title] => 'Solution for package crosstalk minimization' [patent_app_type] => utility [patent_app_number] => 12/469985 [patent_app_country] => US [patent_app_date] => 2009-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4320 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12469985 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/469985
Solution for package crosstalk minimization May 20, 2009 Issued
Array ( [id] => 5488280 [patent_doc_number] => 20090289351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-26 [patent_title] => 'Semiconductor apparatus having both-side heat radiation structure and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/453784 [patent_app_country] => US [patent_app_date] => 2009-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11045 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0289/20090289351.pdf [firstpage_image] =>[orig_patent_app_number] => 12453784 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/453784
Semiconductor apparatus having a two-side heat radiation structure May 20, 2009 Issued
Array ( [id] => 5490453 [patent_doc_number] => 20090291524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-26 [patent_title] => 'COMBINED METALLIC BONDING AND MOLDING FOR ELECTRONIC ASSEMBLIES INCLUDING VOID-REDUCED UNDERFILL' [patent_app_type] => utility [patent_app_number] => 12/469935 [patent_app_country] => US [patent_app_date] => 2009-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7423 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0291/20090291524.pdf [firstpage_image] =>[orig_patent_app_number] => 12469935 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/469935
Combined metallic bonding and molding for electronic assemblies including void-reduced underfill May 20, 2009 Issued
Array ( [id] => 8422193 [patent_doc_number] => 08278681 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-02 [patent_title] => 'Light-emitting diode package and wafer-level packaging process of light-emitting diode' [patent_app_type] => utility [patent_app_number] => 12/469669 [patent_app_country] => US [patent_app_date] => 2009-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3988 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12469669 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/469669
Light-emitting diode package and wafer-level packaging process of light-emitting diode May 19, 2009 Issued
Array ( [id] => 5549325 [patent_doc_number] => 20090283311 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-19 [patent_title] => 'Electronic element wafer module and method for manufacturing electronic element wafer module, electronic element module, and electronic information device' [patent_app_type] => utility [patent_app_number] => 12/387433 [patent_app_country] => US [patent_app_date] => 2009-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 21274 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0283/20090283311.pdf [firstpage_image] =>[orig_patent_app_number] => 12387433 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/387433
Electronic element wafer module and method for manufacturing electronic element wafer module, electronic element module, and electronic information device Apr 30, 2009 Abandoned
Array ( [id] => 8543234 [patent_doc_number] => 08318523 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-27 [patent_title] => 'Thin film transistor, method of fabricating the same and organic light emitting diode display device having the same' [patent_app_type] => utility [patent_app_number] => 12/405466 [patent_app_country] => US [patent_app_date] => 2009-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4126 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12405466 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/405466
Thin film transistor, method of fabricating the same and organic light emitting diode display device having the same Mar 16, 2009 Issued
Array ( [id] => 5483611 [patent_doc_number] => 20090273376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-05 [patent_title] => 'AC/DC CONVERTERS AND METHODS OF MANUFACTURING SAME' [patent_app_type] => utility [patent_app_number] => 12/389357 [patent_app_country] => US [patent_app_date] => 2009-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3641 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0273/20090273376.pdf [firstpage_image] =>[orig_patent_app_number] => 12389357 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/389357
AC/DC CONVERTERS AND METHODS OF MANUFACTURING SAME Feb 18, 2009 Abandoned
Array ( [id] => 6462894 [patent_doc_number] => 20100006852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-14 [patent_title] => 'Thin film transistor and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/314507 [patent_app_country] => US [patent_app_date] => 2008-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9561 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20100006852.pdf [firstpage_image] =>[orig_patent_app_number] => 12314507 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/314507
Thin film transistor and method of fabricating the same Dec 10, 2008 Issued
Array ( [id] => 5439352 [patent_doc_number] => 20090090991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-09 [patent_title] => 'Method for Manufacturing Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 12/330203 [patent_app_country] => US [patent_app_date] => 2008-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2479 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20090090991.pdf [firstpage_image] =>[orig_patent_app_number] => 12330203 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/330203
Method for Manufacturing Semiconductor Device Dec 7, 2008 Abandoned
Array ( [id] => 7997225 [patent_doc_number] => 08080460 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-20 [patent_title] => 'Methods of forming diodes' [patent_app_type] => utility [patent_app_number] => 12/323978 [patent_app_country] => US [patent_app_date] => 2008-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 33 [patent_no_of_words] => 7124 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/080/08080460.pdf [firstpage_image] =>[orig_patent_app_number] => 12323978 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/323978
Methods of forming diodes Nov 25, 2008 Issued
Array ( [id] => 4634426 [patent_doc_number] => 08012877 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-06 [patent_title] => 'Backside nitride removal to reduce streak defects' [patent_app_type] => utility [patent_app_number] => 12/273835 [patent_app_country] => US [patent_app_date] => 2008-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3217 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/012/08012877.pdf [firstpage_image] =>[orig_patent_app_number] => 12273835 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/273835
Backside nitride removal to reduce streak defects Nov 18, 2008 Issued
Array ( [id] => 7545315 [patent_doc_number] => 08053286 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-08 [patent_title] => 'Method of forming semiconductor device including trench gate structure' [patent_app_type] => utility [patent_app_number] => 12/270875 [patent_app_country] => US [patent_app_date] => 2008-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 20 [patent_no_of_words] => 8043 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/053/08053286.pdf [firstpage_image] =>[orig_patent_app_number] => 12270875 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/270875
Method of forming semiconductor device including trench gate structure Nov 13, 2008 Issued
Array ( [id] => 8446223 [patent_doc_number] => 08288275 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-16 [patent_title] => 'Method forming contact plug for semiconductor device using H2 remote plasma treatment' [patent_app_type] => utility [patent_app_number] => 12/271220 [patent_app_country] => US [patent_app_date] => 2008-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 3942 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12271220 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/271220
Method forming contact plug for semiconductor device using H2 remote plasma treatment Nov 13, 2008 Issued
Array ( [id] => 9140163 [patent_doc_number] => 08580622 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-12 [patent_title] => 'Method of making integrated circuit embedded with non-volatile programmable memory having variable coupling' [patent_app_type] => utility [patent_app_number] => 12/271666 [patent_app_country] => US [patent_app_date] => 2008-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6233 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12271666 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/271666
Method of making integrated circuit embedded with non-volatile programmable memory having variable coupling Nov 13, 2008 Issued
Array ( [id] => 8629791 [patent_doc_number] => 08361863 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-29 [patent_title] => 'Embedded DRAM with multiple gate oxide thicknesses' [patent_app_type] => utility [patent_app_number] => 12/291765 [patent_app_country] => US [patent_app_date] => 2008-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 41 [patent_no_of_words] => 8993 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12291765 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/291765
Embedded DRAM with multiple gate oxide thicknesses Nov 12, 2008 Issued
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