Search

Jae Lee

Examiner (ID: 1955, Phone: (571)270-1224 , Office: P/2899 )

Most Active Art Unit
2899
Art Unit(s)
2895, 2823, 2899
Total Applications
951
Issued Applications
742
Pending Applications
2
Abandoned Applications
207

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 256303 [patent_doc_number] => 07575976 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-18 [patent_title] => 'Localized spacer for a multi-gate transistor' [patent_app_type] => utility [patent_app_number] => 11/729033 [patent_app_country] => US [patent_app_date] => 2007-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1427 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/575/07575976.pdf [firstpage_image] =>[orig_patent_app_number] => 11729033 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/729033
Localized spacer for a multi-gate transistor Mar 27, 2007 Issued
Array ( [id] => 4745817 [patent_doc_number] => 20080090419 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-17 [patent_title] => 'Method of forming a hard mask and method of forming a fine pattern of semiconductor device using the same' [patent_app_type] => utility [patent_app_number] => 11/727124 [patent_app_country] => US [patent_app_date] => 2007-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6961 [patent_no_of_claims] => 60 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20080090419.pdf [firstpage_image] =>[orig_patent_app_number] => 11727124 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/727124
Method of forming a hard mask and method of forming a fine pattern of semiconductor device using the same Mar 22, 2007 Issued
Array ( [id] => 4909754 [patent_doc_number] => 20080020520 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-24 [patent_title] => 'Method for manufacturing lower substrate of liquid crystal display device' [patent_app_type] => utility [patent_app_number] => 11/723034 [patent_app_country] => US [patent_app_date] => 2007-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5566 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20080020520.pdf [firstpage_image] =>[orig_patent_app_number] => 11723034 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/723034
Method for manufacturing lower substrate of liquid crystal display device Mar 15, 2007 Abandoned
Array ( [id] => 356239 [patent_doc_number] => 07488675 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-02-10 [patent_title] => 'Method for fabricating IC board without ring structure' [patent_app_type] => utility [patent_app_number] => 11/684583 [patent_app_country] => US [patent_app_date] => 2007-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 2045 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/488/07488675.pdf [firstpage_image] =>[orig_patent_app_number] => 11684583 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/684583
Method for fabricating IC board without ring structure Mar 8, 2007 Issued
Array ( [id] => 4988778 [patent_doc_number] => 20070155117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-05 [patent_title] => 'Phase change memory and method therefor' [patent_app_type] => utility [patent_app_number] => 11/714313 [patent_app_country] => US [patent_app_date] => 2007-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6306 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20070155117.pdf [firstpage_image] =>[orig_patent_app_number] => 11714313 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/714313
Phase change memory and method therefor Mar 5, 2007 Issued
Array ( [id] => 6323561 [patent_doc_number] => 20100244710 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-30 [patent_title] => 'Organic Luminescence Transistor Device and Manufacturing Method Thereof' [patent_app_type] => utility [patent_app_number] => 12/223257 [patent_app_country] => US [patent_app_date] => 2007-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 20367 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0244/20100244710.pdf [firstpage_image] =>[orig_patent_app_number] => 12223257 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/223257
Organic Luminescence Transistor Device and Manufacturing Method Thereof Jan 28, 2007 Abandoned
Array ( [id] => 5175177 [patent_doc_number] => 20070176235 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-02 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR THE SAME' [patent_app_type] => utility [patent_app_number] => 11/627167 [patent_app_country] => US [patent_app_date] => 2007-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 57 [patent_figures_cnt] => 57 [patent_no_of_words] => 18200 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20070176235.pdf [firstpage_image] =>[orig_patent_app_number] => 11627167 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/627167
Semiconductor device and manufacturing method for the same Jan 24, 2007 Issued
Array ( [id] => 4807849 [patent_doc_number] => 20080171427 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-17 [patent_title] => 'EEPROM MEMORY CELL WITH CONTROLLED GEOMETRICAL FEATURES' [patent_app_type] => utility [patent_app_number] => 11/623654 [patent_app_country] => US [patent_app_date] => 2007-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3035 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20080171427.pdf [firstpage_image] =>[orig_patent_app_number] => 11623654 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/623654
EEPROM MEMORY CELL WITH CONTROLLED GEOMETRICAL FEATURES Jan 15, 2007 Abandoned
Array ( [id] => 5217893 [patent_doc_number] => 20070159204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-12 [patent_title] => 'SEMICONDUCTOR DEVICE AND ELECTRONIC COMPONENT MODULE USING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/620799 [patent_app_country] => US [patent_app_date] => 2007-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5046 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20070159204.pdf [firstpage_image] =>[orig_patent_app_number] => 11620799 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/620799
Semiconductor device and electronic component module using the same Jan 7, 2007 Issued
Array ( [id] => 4797541 [patent_doc_number] => 20080009127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-10 [patent_title] => 'Method of removing photoresist' [patent_app_type] => utility [patent_app_number] => 11/646404 [patent_app_country] => US [patent_app_date] => 2006-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9814 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20080009127.pdf [firstpage_image] =>[orig_patent_app_number] => 11646404 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/646404
Method of removing photoresist Dec 27, 2006 Abandoned
Array ( [id] => 369819 [patent_doc_number] => 07476592 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-01-13 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/646894 [patent_app_country] => US [patent_app_date] => 2006-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2444 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/476/07476592.pdf [firstpage_image] =>[orig_patent_app_number] => 11646894 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/646894
Method for manufacturing semiconductor device Dec 26, 2006 Issued
Array ( [id] => 5219920 [patent_doc_number] => 20070161231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-12 [patent_title] => 'Method for forming metal wiring in a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/646093 [patent_app_country] => US [patent_app_date] => 2006-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2680 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20070161231.pdf [firstpage_image] =>[orig_patent_app_number] => 11646093 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/646093
Method for forming metal wiring in a semiconductor device Dec 25, 2006 Abandoned
Array ( [id] => 5219901 [patent_doc_number] => 20070161212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-12 [patent_title] => 'METHOD FOR MANUFACTURING MOSFET ON SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/616274 [patent_app_country] => US [patent_app_date] => 2006-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2024 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20070161212.pdf [firstpage_image] =>[orig_patent_app_number] => 11616274 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/616274
METHOD FOR MANUFACTURING MOSFET ON SEMICONDUCTOR DEVICE Dec 25, 2006 Abandoned
Array ( [id] => 5219921 [patent_doc_number] => 20070161232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-12 [patent_title] => 'METHOD FOR FORMING METAL INTERCONNECTION IN SEMICONDUTOR DAMASCENE PROCESS' [patent_app_type] => utility [patent_app_number] => 11/616273 [patent_app_country] => US [patent_app_date] => 2006-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 2967 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20070161232.pdf [firstpage_image] =>[orig_patent_app_number] => 11616273 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/616273
METHOD FOR FORMING METAL INTERCONNECTION IN SEMICONDUTOR DAMASCENE PROCESS Dec 25, 2006 Abandoned
Array ( [id] => 4904050 [patent_doc_number] => 20080113463 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-15 [patent_title] => 'Method of fabricating GaN device with laser' [patent_app_type] => utility [patent_app_number] => 11/645165 [patent_app_country] => US [patent_app_date] => 2006-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 1855 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20080113463.pdf [firstpage_image] =>[orig_patent_app_number] => 11645165 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/645165
Method of fabricating GaN device with laser Dec 25, 2006 Abandoned
Array ( [id] => 4933016 [patent_doc_number] => 20080003791 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-03 [patent_title] => 'Method for fabricating recess gate in semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/644884 [patent_app_country] => US [patent_app_date] => 2006-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2550 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20080003791.pdf [firstpage_image] =>[orig_patent_app_number] => 11644884 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/644884
Method for fabricating recess gate in semiconductor device Dec 25, 2006 Abandoned
Array ( [id] => 4879861 [patent_doc_number] => 20080153244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'METHOD FOR MANUFACTURING PASSIVE COMPONENTS' [patent_app_type] => utility [patent_app_number] => 11/614994 [patent_app_country] => US [patent_app_date] => 2006-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4316 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20080153244.pdf [firstpage_image] =>[orig_patent_app_number] => 11614994 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/614994
Method for manufacturing passive components Dec 21, 2006 Issued
Array ( [id] => 4876645 [patent_doc_number] => 20080150028 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'ZERO INTERFACE POLYSILICON TO POLYSILICON GATE FOR SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/614774 [patent_app_country] => US [patent_app_date] => 2006-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8530 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0150/20080150028.pdf [firstpage_image] =>[orig_patent_app_number] => 11614774 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/614774
ZERO INTERFACE POLYSILICON TO POLYSILICON GATE FOR SEMICONDUCTOR DEVICE Dec 20, 2006 Abandoned
Array ( [id] => 5219836 [patent_doc_number] => 20070161147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-12 [patent_title] => 'Method of manufacturing CMOS image sensor' [patent_app_type] => utility [patent_app_number] => 11/644203 [patent_app_country] => US [patent_app_date] => 2006-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2280 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20070161147.pdf [firstpage_image] =>[orig_patent_app_number] => 11644203 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/644203
Method of manufacturing CMOS image sensor Dec 20, 2006 Abandoned
Array ( [id] => 4863790 [patent_doc_number] => 20080142849 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-19 [patent_title] => 'Semiconductor ESD device and method of making same' [patent_app_type] => utility [patent_app_number] => 11/638067 [patent_app_country] => US [patent_app_date] => 2006-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3204 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20080142849.pdf [firstpage_image] =>[orig_patent_app_number] => 11638067 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/638067
Semiconductor ESD device and method of making same Dec 12, 2006 Issued
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