
Jae Lee
Examiner (ID: 1955, Phone: (571)270-1224 , Office: P/2899 )
| Most Active Art Unit | 2899 |
| Art Unit(s) | 2895, 2823, 2899 |
| Total Applications | 951 |
| Issued Applications | 742 |
| Pending Applications | 2 |
| Abandoned Applications | 207 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5228080
[patent_doc_number] => 20070290187
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-20
[patent_title] => 'REPAIR STRUCTURE AND ACTIVE DEVICE ARRAY SUBSTRATE'
[patent_app_type] => utility
[patent_app_number] => 11/567217
[patent_app_country] => US
[patent_app_date] => 2006-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4197
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0290/20070290187.pdf
[firstpage_image] =>[orig_patent_app_number] => 11567217
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/567217 | Repair structure and active device array substrate | Dec 5, 2006 | Issued |
Array
(
[id] => 5217399
[patent_doc_number] => 20070158710
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-12
[patent_title] => 'Low-noise image sensor and transistor for image sensor'
[patent_app_type] => utility
[patent_app_number] => 11/633887
[patent_app_country] => US
[patent_app_date] => 2006-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6003
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0158/20070158710.pdf
[firstpage_image] =>[orig_patent_app_number] => 11633887
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/633887 | Low-noise image sensor and transistor for image sensor | Dec 4, 2006 | Abandoned |
Array
(
[id] => 5253393
[patent_doc_number] => 20070134849
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-06-14
[patent_title] => 'Method for embedding dies'
[patent_app_type] => utility
[patent_app_number] => 11/602733
[patent_app_country] => US
[patent_app_date] => 2006-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7632
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0134/20070134849.pdf
[firstpage_image] =>[orig_patent_app_number] => 11602733
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/602733 | Method for embedding dies | Nov 20, 2006 | Issued |
Array
(
[id] => 4915752
[patent_doc_number] => 20080096352
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-04-24
[patent_title] => 'Method of forming a semiconductor memory device and semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 11/541404
[patent_app_country] => US
[patent_app_date] => 2006-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2794
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0096/20080096352.pdf
[firstpage_image] =>[orig_patent_app_number] => 11541404
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/541404 | Method of forming a semiconductor memory device and semiconductor memory device | Sep 28, 2006 | Issued |
Array
(
[id] => 5165685
[patent_doc_number] => 20070287272
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-13
[patent_title] => 'SELECTIVE EPITAXIAL FORMATION OF SEMICONDUCTOR FILMS'
[patent_app_type] => utility
[patent_app_number] => 11/536463
[patent_app_country] => US
[patent_app_date] => 2006-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 8120
[patent_no_of_claims] => 46
[patent_no_of_ind_claims] => 4
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0287/20070287272.pdf
[firstpage_image] =>[orig_patent_app_number] => 11536463
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/536463 | Selective epitaxial formation of semiconductor films | Sep 27, 2006 | Issued |
Array
(
[id] => 5116898
[patent_doc_number] => 20070138612
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-06-21
[patent_title] => 'Stackable electronic device assembly and high G-force test fixture'
[patent_app_type] => utility
[patent_app_number] => 11/495287
[patent_app_country] => US
[patent_app_date] => 2006-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 5179
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 2
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0138/20070138612.pdf
[firstpage_image] =>[orig_patent_app_number] => 11495287
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/495287 | Stackable electronic device assembly and high G-force test fixture | Jul 27, 2006 | Abandoned |
Array
(
[id] => 5659262
[patent_doc_number] => 20060249858
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-11-09
[patent_title] => 'Stencil and method for depositing material onto a substrate'
[patent_app_type] => utility
[patent_app_number] => 11/485052
[patent_app_country] => US
[patent_app_date] => 2006-07-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4232
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0249/20060249858.pdf
[firstpage_image] =>[orig_patent_app_number] => 11485052
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/485052 | Stencil and method for depositing material onto a substrate | Jul 10, 2006 | Issued |
Array
(
[id] => 4932985
[patent_doc_number] => 20080003760
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-03
[patent_title] => 'Magnetic vias for inductors and transformers in integrated circuits'
[patent_app_type] => utility
[patent_app_number] => 11/479234
[patent_app_country] => US
[patent_app_date] => 2006-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 6748
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0003/20080003760.pdf
[firstpage_image] =>[orig_patent_app_number] => 11479234
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/479234 | Magnetic vias for inductors and transformers in integrated circuits | Jun 29, 2006 | Abandoned |
Array
(
[id] => 7535115
[patent_doc_number] => 08048739
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-11-01
[patent_title] => 'Method of manufacturing flash memory device'
[patent_app_type] => utility
[patent_app_number] => 11/479084
[patent_app_country] => US
[patent_app_date] => 2006-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 2485
[patent_no_of_claims] => 16
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/048/08048739.pdf
[firstpage_image] =>[orig_patent_app_number] => 11479084
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/479084 | Method of manufacturing flash memory device | Jun 29, 2006 | Issued |
Array
(
[id] => 5098656
[patent_doc_number] => 20070181916
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-08-09
[patent_title] => 'Method of manufacturing flash memory device'
[patent_app_type] => utility
[patent_app_number] => 11/478794
[patent_app_country] => US
[patent_app_date] => 2006-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4669
[patent_no_of_claims] => 19
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0181/20070181916.pdf
[firstpage_image] =>[orig_patent_app_number] => 11478794
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/478794 | Method of manufacturing flash memory device | Jun 29, 2006 | Abandoned |
Array
(
[id] => 4932980
[patent_doc_number] => 20080003755
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-03
[patent_title] => 'Sacrificial oxide layer which enables spacer over-etch in tri-gate architectures'
[patent_app_type] => utility
[patent_app_number] => 11/479713
[patent_app_country] => US
[patent_app_date] => 2006-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 2958
[patent_no_of_claims] => 20
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0003/20080003755.pdf
[firstpage_image] =>[orig_patent_app_number] => 11479713
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/479713 | Sacrificial oxide layer which enables spacer over-etch in tri-gate architectures | Jun 29, 2006 | Abandoned |
Array
(
[id] => 4933005
[patent_doc_number] => 20080003780
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-03
[patent_title] => 'Detachable stiffener for ultra-thin die'
[patent_app_type] => utility
[patent_app_number] => 11/479834
[patent_app_country] => US
[patent_app_date] => 2006-06-30
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 3967
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0003/20080003780.pdf
[firstpage_image] =>[orig_patent_app_number] => 11479834
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/479834 | Detachable stiffener for ultra-thin die | Jun 29, 2006 | Abandoned |
Array
(
[id] => 4933029
[patent_doc_number] => 20080003804
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-03
[patent_title] => 'Method of providing solder bumps of mixed sizes on a substrate using solder transfer in two stages'
[patent_app_type] => utility
[patent_app_number] => 11/478754
[patent_app_country] => US
[patent_app_date] => 2006-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 4900
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[pdf_file] => publications/A1/0003/20080003804.pdf
[firstpage_image] =>[orig_patent_app_number] => 11478754
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/478754 | Method of providing solder bumps of mixed sizes on a substrate using solder transfer in two stages | Jun 28, 2006 | Abandoned |
Array
(
[id] => 5188650
[patent_doc_number] => 20070166958
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-19
[patent_title] => 'METHOD OF WAFER LEVEL PACKAGING AND CUTTING'
[patent_app_type] => utility
[patent_app_number] => 11/427343
[patent_app_country] => US
[patent_app_date] => 2006-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[patent_no_of_words] => 1827
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[firstpage_image] =>[orig_patent_app_number] => 11427343
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/427343 | METHOD OF WAFER LEVEL PACKAGING AND CUTTING | Jun 28, 2006 | Abandoned |
Array
(
[id] => 4930487
[patent_doc_number] => 20080001262
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-03
[patent_title] => 'Silicon level solution for mitigation of substrate noise'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/479583 | Silicon level solution for mitigation of substrate noise | Jun 28, 2006 | Abandoned |
Array
(
[id] => 5253413
[patent_doc_number] => 20070134869
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-06-14
[patent_title] => 'Method for fabricating semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/479244
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[firstpage_image] =>[orig_patent_app_number] => 11479244
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/479244 | Method for fabricating semiconductor device | Jun 28, 2006 | Abandoned |
Array
(
[id] => 5219847
[patent_doc_number] => 20070161158
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[patent_kind] => A1
[patent_issue_date] => 2007-07-12
[patent_title] => 'METHOD FOR WAFER LEVEL PACKAGING AND FABRICATING CAP STRUCTURES'
[patent_app_type] => utility
[patent_app_number] => 11/426573
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[firstpage_image] =>[orig_patent_app_number] => 11426573
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/426573 | Method for wafer level packaging and fabricating cap structures | Jun 25, 2006 | Issued |
Array
(
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[patent_title] => 'Method for manufacturing light emitting device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/455254 | Method for manufacturing light emitting device | Jun 15, 2006 | Issued |
Array
(
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[patent_title] => 'Method for manufacturing light emitting diodes'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/450343 | Method for manufacturing light emitting diodes | Jun 11, 2006 | Issued |
Array
(
[id] => 5165612
[patent_doc_number] => 20070287199
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[patent_title] => 'Base oxide engineering for high-K gate stacks'
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[firstpage_image] =>[orig_patent_app_number] => 11450204
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/450204 | Base oxide engineering for high-K gate stacks | Jun 8, 2006 | Issued |