
Jaehwan Oh
Examiner (ID: 7284)
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2186, 2899, 2816, 2898 |
| Total Applications | 1048 |
| Issued Applications | 889 |
| Pending Applications | 71 |
| Abandoned Applications | 108 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19900231
[patent_doc_number] => 12278168
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2025-04-15
[patent_title] => Semiconductor device including interconnect structure with planarization stop layer
[patent_app_type] => utility
[patent_app_number] => 18/886289
[patent_app_country] => US
[patent_app_date] => 2024-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 35
[patent_no_of_words] => 6611
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18886289
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/886289 | Semiconductor device including interconnect structure with planarization stop layer | Sep 15, 2024 | Issued |
Array
(
[id] => 19528720
[patent_doc_number] => 20240352622
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-24
[patent_title] => LARGE DIAMETER SILICON CARBIDE WAFERS
[patent_app_type] => utility
[patent_app_number] => 18/762896
[patent_app_country] => US
[patent_app_date] => 2024-07-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19389
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18762896
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/762896 | Large diameter silicon carbide wafers | Jul 2, 2024 | Issued |
Array
(
[id] => 20213868
[patent_doc_number] => 12410512
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-09-09
[patent_title] => Apparatus and method for manufacturing metal gate structures
[patent_app_type] => utility
[patent_app_number] => 18/746717
[patent_app_country] => US
[patent_app_date] => 2024-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 9397
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18746717
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/746717 | Apparatus and method for manufacturing metal gate structures | Jun 17, 2024 | Issued |
Array
(
[id] => 19483976
[patent_doc_number] => 20240332018
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-03
[patent_title] => Deposition Equipment with Adjustable Temperature Source
[patent_app_type] => utility
[patent_app_number] => 18/738526
[patent_app_country] => US
[patent_app_date] => 2024-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12786
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18738526
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/738526 | Deposition equipment with adjustable temperature source | Jun 9, 2024 | Issued |
Array
(
[id] => 19701859
[patent_doc_number] => 12195875
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-14
[patent_title] => Laser processing system integrated with MBE device
[patent_app_type] => utility
[patent_app_number] => 18/670872
[patent_app_country] => US
[patent_app_date] => 2024-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 7577
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 623
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18670872
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/670872 | Laser processing system integrated with MBE device | May 21, 2024 | Issued |
Array
(
[id] => 19420961
[patent_doc_number] => 20240297085
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-05
[patent_title] => POWER ALARM AND FIRE LOADING RISK REDUCTION FOR A DEPOSITION TOOL
[patent_app_type] => utility
[patent_app_number] => 18/663776
[patent_app_country] => US
[patent_app_date] => 2024-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5170
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 31
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18663776
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/663776 | POWER ALARM AND FIRE LOADING RISK REDUCTION FOR A DEPOSITION TOOL | May 13, 2024 | Pending |
Array
(
[id] => 19321505
[patent_doc_number] => 20240243052
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-18
[patent_title] => VERTICALLY SPACED INTRA-LEVEL INTERCONNECT LINE METALLIZATION FOR INTEGRATED CIRCUIT DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/622500
[patent_app_country] => US
[patent_app_date] => 2024-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11310
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18622500
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/622500 | Vertically spaced intra-level interconnect line metallization for integrated circuit devices | Mar 28, 2024 | Issued |
Array
(
[id] => 19305634
[patent_doc_number] => 20240234214
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-11
[patent_title] => GATE STRUCTURE AND PATTERNING METHOD
[patent_app_type] => utility
[patent_app_number] => 18/615403
[patent_app_country] => US
[patent_app_date] => 2024-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8193
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18615403
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/615403 | GATE STRUCTURE AND PATTERNING METHOD | Mar 24, 2024 | Pending |
Array
(
[id] => 19271546
[patent_doc_number] => 20240215253
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-27
[patent_title] => SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/601027
[patent_app_country] => US
[patent_app_date] => 2024-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12897
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -3
[patent_words_short_claim] => 247
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18601027
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/601027 | SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME | Mar 10, 2024 | Pending |
Array
(
[id] => 20089050
[patent_doc_number] => 20250218986
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-07-03
[patent_title] => METHOD FOR FORMING DEVICE SUBSTRATE, METHOD FOR FORMING PACKAGE STRUCTURE AND PACKAGE STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 18/600981
[patent_app_country] => US
[patent_app_date] => 2024-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4226
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18600981
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/600981 | METHOD FOR FORMING DEVICE SUBSTRATE, METHOD FOR FORMING PACKAGE STRUCTURE AND PACKAGE STRUCTURE | Mar 10, 2024 | Pending |
Array
(
[id] => 20224674
[patent_doc_number] => 20250287605
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-09-11
[patent_title] => SEMICONDUCTOR DEVICE WITH LOW CURRENT LEAKAGE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/600934
[patent_app_country] => US
[patent_app_date] => 2024-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5581
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18600934
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/600934 | SEMICONDUCTOR DEVICE WITH LOW CURRENT LEAKAGE AND METHOD FOR MANUFACTURING THE SAME | Mar 10, 2024 | Pending |
Array
(
[id] => 19575312
[patent_doc_number] => 20240379604
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-14
[patent_title] => SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/592908
[patent_app_country] => US
[patent_app_date] => 2024-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 17120
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 187
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18592908
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/592908 | SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME | Feb 29, 2024 | Pending |
Array
(
[id] => 19751736
[patent_doc_number] => 20250040301
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-30
[patent_title] => LIGHT-EMITTING ELEMENT, DISPLAY DEVICE INCLUDING THE SAME, AND METHOD OF FABRICATING LIGHT-EMITTING ELEMENT
[patent_app_type] => utility
[patent_app_number] => 18/590971
[patent_app_country] => US
[patent_app_date] => 2024-02-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14919
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18590971
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/590971 | LIGHT-EMITTING ELEMENT, DISPLAY DEVICE INCLUDING THE SAME, AND METHOD OF FABRICATING LIGHT-EMITTING ELEMENT | Feb 28, 2024 | Pending |
Array
(
[id] => 20198505
[patent_doc_number] => 20250275215
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-08-28
[patent_title] => DEEPLY RECESSED TOP METAL GATE FOR GATE-ALL-AROUND FIELD EFFECT TRANSISTOR
[patent_app_type] => utility
[patent_app_number] => 18/584903
[patent_app_country] => US
[patent_app_date] => 2024-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2115
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 215
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18584903
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/584903 | DEEPLY RECESSED TOP METAL GATE FOR GATE-ALL-AROUND FIELD EFFECT TRANSISTOR | Feb 21, 2024 | Pending |
Array
(
[id] => 20196827
[patent_doc_number] => 20250273537
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-08-28
[patent_title] => POSITIONING DEVICE WITH HEAT DISSIPATION EFFECT
[patent_app_type] => utility
[patent_app_number] => 18/584294
[patent_app_country] => US
[patent_app_date] => 2024-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18584294
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/584294 | POSITIONING DEVICE WITH HEAT DISSIPATION EFFECT | Feb 21, 2024 | Pending |
Array
(
[id] => 19534011
[patent_doc_number] => 20240357913
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-24
[patent_title] => BANK TRANSMISSION PATTERN OF COLOR CONVERSION PANEL, DISPLAY DEVICE INCLUDING THE SAME, AND METHOD OF PROVIDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/442641
[patent_app_country] => US
[patent_app_date] => 2024-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11371
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18442641
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/442641 | BANK TRANSMISSION PATTERN OF COLOR CONVERSION PANEL, DISPLAY DEVICE INCLUDING THE SAME, AND METHOD OF PROVIDING THE SAME | Feb 14, 2024 | Pending |
Array
(
[id] => 20153320
[patent_doc_number] => 20250253158
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-08-07
[patent_title] => DRY DEPOSITION OF EXTREME ULTRAVIOLET (EUV) UNDERLAYER FOR LITHOGRAPHY AND PATTERNING
[patent_app_type] => utility
[patent_app_number] => 18/433210
[patent_app_country] => US
[patent_app_date] => 2024-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2108
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18433210
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/433210 | DRY DEPOSITION OF EXTREME ULTRAVIOLET (EUV) UNDERLAYER FOR LITHOGRAPHY AND PATTERNING | Feb 4, 2024 | Pending |
Array
(
[id] => 19321610
[patent_doc_number] => 20240243157
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-18
[patent_title] => PHOTOELECTRIC CONVERSION ELEMENT AND PHOTOELECTRIC CONVERSION DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/411458
[patent_app_country] => US
[patent_app_date] => 2024-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20135
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -27
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18411458
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/411458 | PHOTOELECTRIC CONVERSION ELEMENT AND PHOTOELECTRIC CONVERSION DEVICE | Jan 11, 2024 | Pending |
Array
(
[id] => 20055857
[patent_doc_number] => 20250194079
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-12
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/398236
[patent_app_country] => US
[patent_app_date] => 2023-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2203
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18398236
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/398236 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME | Dec 27, 2023 | Pending |
Array
(
[id] => 19767492
[patent_doc_number] => 12225808
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-02-11
[patent_title] => In-line monitoring of OLED layer thickness and dopant concentration
[patent_app_type] => utility
[patent_app_number] => 18/395081
[patent_app_country] => US
[patent_app_date] => 2023-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 10929
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 234
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18395081
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/395081 | In-line monitoring of OLED layer thickness and dopant concentration | Dec 21, 2023 | Issued |