Jaehwan Oh

Array ( [id] => 17986371 [patent_doc_number] => 20220352408 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => METHOD TO DEPOSIT THIN FILM HIGH QUALITY ABSORBER LAYER [patent_app_type] => utility [patent_app_number] => 17/631877 [patent_app_country] => US [patent_app_date] => 2019-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5647 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17631877 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15672947 [patent_doc_number] => 10600714 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-24 [patent_title] => Methods for establishing thermal joints between heat spreaders or lids and heat sources [patent_app_type] => utility [patent_app_number] => 16/529063 [patent_app_country] => US [patent_app_date] => 2019-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 8591 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16529063 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17795577 [patent_doc_number] => 20220254669 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-11 [patent_title] => SYSTEM AND METHOD TO EVAPORATE AN OLED LAYER STACK IN A VERTICAL ORIENTATION [patent_app_type] => utility [patent_app_number] => 17/629095 [patent_app_country] => US [patent_app_date] => 2019-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10757 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17629095 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17142143 [patent_doc_number] => 20210310155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => GALLIUM ARSENIDE SINGLE CRYSTAL SUBSTRATE [patent_app_type] => utility [patent_app_number] => 17/288153 [patent_app_country] => US [patent_app_date] => 2019-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9854 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17288153 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15030635 [patent_doc_number] => 20190326322 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-24 [patent_title] => SEMICONDUCTOR MEMORY [patent_app_type] => utility [patent_app_number] => 16/460410 [patent_app_country] => US [patent_app_date] => 2019-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9905 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16460410 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15922349 [patent_doc_number] => 10658423 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Method of manufacturing light emitting device [patent_app_type] => utility [patent_app_number] => 16/455549 [patent_app_country] => US [patent_app_date] => 2019-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 60 [patent_no_of_words] => 12978 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16455549 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17930311 [patent_doc_number] => 20220325436 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => EPITAXIAL WAFER GROWTH FURNACE, APPARATUS, MOCVD METHOD AND EPITAXIAL WAFER [patent_app_type] => utility [patent_app_number] => 17/618167 [patent_app_country] => US [patent_app_date] => 2019-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3089 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17618167 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15000313 [patent_doc_number] => 20190319114 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-17 [patent_title] => FORMATION OF SELF-ALIGNED BOTTOM SPACER FOR VERTICAL TRANSISTORS [patent_app_type] => utility [patent_app_number] => 16/454587 [patent_app_country] => US [patent_app_date] => 2019-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5998 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16454587 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14968957 [patent_doc_number] => 20190311957 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-10 [patent_title] => Source/Drain Features with an Etch Stop Layer [patent_app_type] => utility [patent_app_number] => 16/449510 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7091 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16449510 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18090245 [patent_doc_number] => 11540395 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-27 [patent_title] => Stacked-component placement in multiple-damascene printed wiring boards for semiconductor package substrates [patent_app_type] => utility [patent_app_number] => 16/450307 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8508 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16450307 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17971273 [patent_doc_number] => 11488821 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Film forming method and crystalline multilayer structure [patent_app_type] => utility [patent_app_number] => 17/256414 [patent_app_country] => US [patent_app_date] => 2019-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 9355 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17256414 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15274647 [patent_doc_number] => 20190386058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => METHOD OF MANUFACTURING SOLID-STATE IMAGE SENSOR [patent_app_type] => utility [patent_app_number] => 16/440054 [patent_app_country] => US [patent_app_date] => 2019-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5054 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16440054 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15831503 [patent_doc_number] => 20200131033 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => ACTUATOR LAYER PATTERNING WITH TOPOGRAPHY [patent_app_type] => utility [patent_app_number] => 16/440816 [patent_app_country] => US [patent_app_date] => 2019-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3492 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16440816 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16339196 [patent_doc_number] => 10790164 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-29 [patent_title] => Method for forming package structure [patent_app_type] => utility [patent_app_number] => 16/439944 [patent_app_country] => US [patent_app_date] => 2019-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 40 [patent_no_of_words] => 7487 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16439944 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15299837 [patent_doc_number] => 20190393054 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => LIGHT IRRADIATION TYPE HEAT TREATMENT APPARATUS [patent_app_type] => utility [patent_app_number] => 16/440431 [patent_app_country] => US [patent_app_date] => 2019-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12302 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16440431 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16502425 [patent_doc_number] => 10867819 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-15 [patent_title] => Vacuum processing apparatus, vacuum processing system and vacuum processing method [patent_app_type] => utility [patent_app_number] => 16/438781 [patent_app_country] => US [patent_app_date] => 2019-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7887 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16438781 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15351589 [patent_doc_number] => 20200013686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => ELECTRONIC DEVICE AND METHOD FOR REPAIRING ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 16/438729 [patent_app_country] => US [patent_app_date] => 2019-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8042 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16438729 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16553332 [patent_doc_number] => 10886505 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-05 [patent_title] => Manufacturing method of display apparatus utilizing dam portion and display apparatus manufactured using the method [patent_app_type] => utility [patent_app_number] => 16/437792 [patent_app_country] => US [patent_app_date] => 2019-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 8824 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16437792 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16944358 [patent_doc_number] => 11056611 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => Mesa formation for wafer-to-wafer bonding [patent_app_type] => utility [patent_app_number] => 16/436794 [patent_app_country] => US [patent_app_date] => 2019-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 34 [patent_no_of_words] => 15460 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16436794 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16218456 [patent_doc_number] => 10734278 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-04 [patent_title] => Method of protecting low-K layers [patent_app_type] => utility [patent_app_number] => 16/436687 [patent_app_country] => US [patent_app_date] => 2019-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 25 [patent_no_of_words] => 4656 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16436687 [rel_patent_id] =>[rel_patent_doc_number] =>)