
Jaehwan Oh
Examiner (ID: 6253, Phone: (571)270-5800 , Office: P/2816 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2898, 2186, 2816, 2899 |
| Total Applications | 1013 |
| Issued Applications | 874 |
| Pending Applications | 65 |
| Abandoned Applications | 108 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 16433131
[patent_doc_number] => 10833231
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-11-10
[patent_title] => Method for producing an optoelectronic component, and optoelectronic component
[patent_app_type] => utility
[patent_app_number] => 16/094870
[patent_app_country] => US
[patent_app_date] => 2017-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 3187
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16094870
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/094870 | Method for producing an optoelectronic component, and optoelectronic component | Apr 12, 2017 | Issued |
Array
(
[id] => 14316901
[patent_doc_number] => 20190148154
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-16
[patent_title] => CONTACTLESS ELECTRIC POWER SUPPLY MECHANISM AND METHOD FOR ROTARY TABLE, AND WAFER ROTATING AND HOLDING DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/094383
[patent_app_country] => US
[patent_app_date] => 2017-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3028
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16094383
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/094383 | Contactless electric power supply mechanism and method for rotary table, and wafer rotating and holding device | Mar 28, 2017 | Issued |
Array
(
[id] => 17033037
[patent_doc_number] => 11094857
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-08-17
[patent_title] => Method for manufacturing lighting device
[patent_app_type] => utility
[patent_app_number] => 16/496289
[patent_app_country] => US
[patent_app_date] => 2017-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 32
[patent_figures_cnt] => 32
[patent_no_of_words] => 9612
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16496289
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/496289 | Method for manufacturing lighting device | Mar 27, 2017 | Issued |
Array
(
[id] => 12019846
[patent_doc_number] => 09812558
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-11-07
[patent_title] => 'Three-dimensional transistor and methods of manufacturing thereof'
[patent_app_type] => utility
[patent_app_number] => 15/466656
[patent_app_country] => US
[patent_app_date] => 2017-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 54
[patent_no_of_words] => 9016
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15466656
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/466656 | Three-dimensional transistor and methods of manufacturing thereof | Mar 21, 2017 | Issued |
Array
(
[id] => 11904567
[patent_doc_number] => 09774014
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-09-26
[patent_title] => 'Array substrate of organic light-emitting diodes and method for packaging the same'
[patent_app_type] => utility
[patent_app_number] => 15/460084
[patent_app_country] => US
[patent_app_date] => 2017-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 3509
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 202
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15460084
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/460084 | Array substrate of organic light-emitting diodes and method for packaging the same | Mar 14, 2017 | Issued |
Array
(
[id] => 14137767
[patent_doc_number] => 20190103273
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-04-04
[patent_title] => Method for Producing Group III Nitride Laminate
[patent_app_type] => utility
[patent_app_number] => 16/087360
[patent_app_country] => US
[patent_app_date] => 2017-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8870
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16087360
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/087360 | Method for Producing Group III Nitride Laminate | Mar 14, 2017 | Abandoned |
Array
(
[id] => 13996949
[patent_doc_number] => 20190067632
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-02-28
[patent_title] => METHOD FOR MANUFACTURING ORGANIC ELECTRONIC DEVICE SEALING BODY
[patent_app_type] => utility
[patent_app_number] => 16/080750
[patent_app_country] => US
[patent_app_date] => 2017-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11528
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16080750
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/080750 | Method for manufacturing organic electronic device sealing body | Mar 12, 2017 | Issued |
Array
(
[id] => 11674094
[patent_doc_number] => 20170162817
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-08
[patent_title] => 'ORGANIC ELECTROLUMINESCENT ELEMENT'
[patent_app_type] => utility
[patent_app_number] => 15/438978
[patent_app_country] => US
[patent_app_date] => 2017-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 20730
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15438978
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/438978 | Organic electroluminescent element | Feb 21, 2017 | Issued |
Array
(
[id] => 13819363
[patent_doc_number] => 10186455
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-01-22
[patent_title] => Interconnect structure and methods of making same
[patent_app_type] => utility
[patent_app_number] => 15/428943
[patent_app_country] => US
[patent_app_date] => 2017-02-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 3624
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15428943
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/428943 | Interconnect structure and methods of making same | Feb 8, 2017 | Issued |
Array
(
[id] => 16672055
[patent_doc_number] => 20210060818
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-03-04
[patent_title] => METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE, METHOD FOR MANUFACTURING SILICON CARBIDE EPITAXIAL SUBSTRATE, AND METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/078089
[patent_app_country] => US
[patent_app_date] => 2017-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9803
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16078089
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/078089 | Method for manufacturing silicon carbide substrate, method for manufacturing silicon carbide epitaxial substrate, and method for manufacturing silicon carbide semiconductor device | Jan 25, 2017 | Issued |
Array
(
[id] => 15181111
[patent_doc_number] => 20190361147
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-11-28
[patent_title] => DESIGNING A GEOLOGICAL SIMULATION GRID
[patent_app_type] => utility
[patent_app_number] => 16/478111
[patent_app_country] => US
[patent_app_date] => 2017-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8811
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16478111
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/478111 | Designing a geological simulation grid | Jan 18, 2017 | Issued |
Array
(
[id] => 12168405
[patent_doc_number] => 09887176
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-02-06
[patent_title] => 'Semiconductor package'
[patent_app_type] => utility
[patent_app_number] => 15/403409
[patent_app_country] => US
[patent_app_date] => 2017-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 205
[patent_figures_cnt] => 205
[patent_no_of_words] => 29993
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 233
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15403409
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/403409 | Semiconductor package | Jan 10, 2017 | Issued |
Array
(
[id] => 11673731
[patent_doc_number] => 20170162454
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-08
[patent_title] => 'SYSTEMS AND METHODS FOR INTERCONNECT SIMULATION AND CHARACTERIZATION'
[patent_app_type] => utility
[patent_app_number] => 15/367318
[patent_app_country] => US
[patent_app_date] => 2016-12-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 3778
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15367318
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/367318 | Systems and methods for interconnect simulation and characterization | Dec 1, 2016 | Issued |
Array
(
[id] => 12375525
[patent_doc_number] => 09960068
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-05-01
[patent_title] => Moment cancelling pad raising mechanism in wafer positioning pedestal for semiconductor processing
[patent_app_type] => utility
[patent_app_number] => 15/367903
[patent_app_country] => US
[patent_app_date] => 2016-12-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 36
[patent_figures_cnt] => 42
[patent_no_of_words] => 26114
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15367903
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/367903 | Moment cancelling pad raising mechanism in wafer positioning pedestal for semiconductor processing | Dec 1, 2016 | Issued |
Array
(
[id] => 12800998
[patent_doc_number] => 20180158835
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-06-07
[patent_title] => LOGIC AND FLASH FIELD-EFFECT TRANSISTORS
[patent_app_type] => utility
[patent_app_number] => 15/366425
[patent_app_country] => US
[patent_app_date] => 2016-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4373
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15366425
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/366425 | Logic and flash field-effect transistors | Nov 30, 2016 | Issued |
Array
(
[id] => 12195660
[patent_doc_number] => 09899396
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-02-20
[patent_title] => 'Semiconductor device, fabricating method thereof, and fabricating method of memory'
[patent_app_type] => utility
[patent_app_number] => 15/366682
[patent_app_country] => US
[patent_app_date] => 2016-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3116
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15366682
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/366682 | Semiconductor device, fabricating method thereof, and fabricating method of memory | Nov 30, 2016 | Issued |
Array
(
[id] => 11890895
[patent_doc_number] => 09761460
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-09-12
[patent_title] => 'Method of fabricating semiconductor structure'
[patent_app_type] => utility
[patent_app_number] => 15/365967
[patent_app_country] => US
[patent_app_date] => 2016-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 3496
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15365967
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/365967 | Method of fabricating semiconductor structure | Nov 30, 2016 | Issued |
Array
(
[id] => 11746585
[patent_doc_number] => 20170200658
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-07-13
[patent_title] => 'METHODS OF INSPECTING SUBSTRATES AND SEMICONDUCTOR FABRICATION METHODS INCORPORATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 15/366964
[patent_app_country] => US
[patent_app_date] => 2016-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4085
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15366964
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/366964 | METHODS OF INSPECTING SUBSTRATES AND SEMICONDUCTOR FABRICATION METHODS INCORPORATING THE SAME | Nov 30, 2016 | Abandoned |
Array
(
[id] => 11718221
[patent_doc_number] => 20170186721
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-29
[patent_title] => 'SEMICONDUCTOR MOUNTING APPARATUS, HEAD THEREOF, AND METHOD FOR MANUFACTURING LAMINATED CHIP'
[patent_app_type] => utility
[patent_app_number] => 15/365192
[patent_app_country] => US
[patent_app_date] => 2016-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 6985
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15365192
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/365192 | Semiconductor mounting apparatus, head thereof, and method for manufacturing laminated chip | Nov 29, 2016 | Issued |
Array
(
[id] => 12033709
[patent_doc_number] => 20170323807
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-11-09
[patent_title] => 'SUBSTRATE PROCESSING SYSTEM AND SUBSTRATE PROCESSING METHOD'
[patent_app_type] => utility
[patent_app_number] => 15/363334
[patent_app_country] => US
[patent_app_date] => 2016-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 45
[patent_figures_cnt] => 45
[patent_no_of_words] => 26721
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15363334
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/363334 | Substrate processing system and substrate processing method | Nov 28, 2016 | Issued |