
Jaehwan Oh
Examiner (ID: 6253, Phone: (571)270-5800 , Office: P/2816 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2898, 2186, 2816, 2899 |
| Total Applications | 1013 |
| Issued Applications | 874 |
| Pending Applications | 65 |
| Abandoned Applications | 108 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 12120590
[patent_doc_number] => 20180004177
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-01-04
[patent_title] => 'ADAPTIVE ADJUSTMENT OF MOTION SENSITIVITY OF A MOTION SENSOR'
[patent_app_type] => utility
[patent_app_number] => 15/197344
[patent_app_country] => US
[patent_app_date] => 2016-06-29
[patent_effective_date] => 0000-00-00
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Array
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[patent_doc_number] => 09728734
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[patent_kind] => B2
[patent_issue_date] => 2017-08-08
[patent_title] => 'Aligned carbon nanotubes for use in high performance field effect transistors'
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Array
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[patent_issue_date] => 2017-06-13
[patent_title] => 'Methods of forming memory cells with air gaps and other low dielectric constant materials'
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Array
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[patent_title] => 'METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE'
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Array
(
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[patent_title] => Air gap over transistor gate and related method
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Array
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Array
(
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[patent_title] => 'Forming resistive random access memories together with fuse arrays'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/153293 | Forming resistive random access memories together with fuse arrays | May 11, 2016 | Issued |
Array
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[id] => 12741211
[patent_doc_number] => 20180138904
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[patent_issue_date] => 2018-05-17
[patent_title] => POWER TRANSISTOR DRIVING APPARATUS
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/570399 | Power transistor driving apparatus | May 11, 2016 | Issued |
Array
(
[id] => 12250090
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[patent_issue_date] => 2018-03-20
[patent_title] => 'Tungsten films by organometallic or silane pre-treatment of substrate'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/151612 | Tungsten films by organometallic or silane pre-treatment of substrate | May 10, 2016 | Issued |
Array
(
[id] => 16339192
[patent_doc_number] => 10790160
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-09-29
[patent_title] => Barrier configurations and processes in layer structures
[patent_app_type] => utility
[patent_app_number] => 15/152544
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/152544 | Barrier configurations and processes in layer structures | May 10, 2016 | Issued |
Array
(
[id] => 11339491
[patent_doc_number] => 20160365247
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[patent_issue_date] => 2016-12-15
[patent_title] => 'METHOD OF FABRICATING TRANSIENT SEMICONDUCTOR BASED ON SINGLE-WALL NANOTUBE'
[patent_app_type] => utility
[patent_app_number] => 15/152121
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/152121 | Method of fabricating transient semiconductor based on single-wall nanotube | May 10, 2016 | Issued |
Array
(
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[patent_issue_date] => 2016-11-17
[patent_title] => 'METHOD OF FORMING PATTERN AND METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE BY USING THE SAME'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/152096 | Method of forming pattern and method of manufacturing integrated circuit device by using the same | May 10, 2016 | Issued |
Array
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Array
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Array
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Array
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Array
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