Search

Jaehwan Oh

Examiner (ID: 6253, Phone: (571)270-5800 , Office: P/2816 )

Most Active Art Unit
2816
Art Unit(s)
2898, 2186, 2816, 2899
Total Applications
1013
Issued Applications
874
Pending Applications
65
Abandoned Applications
108

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12120590 [patent_doc_number] => 20180004177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'ADAPTIVE ADJUSTMENT OF MOTION SENSITIVITY OF A MOTION SENSOR' [patent_app_type] => utility [patent_app_number] => 15/197344 [patent_app_country] => US [patent_app_date] => 2016-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4849 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15197344 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/197344
Adaptive adjustment of motion sensitivity of a motion sensor Jun 28, 2016 Issued
Array ( [id] => 11831984 [patent_doc_number] => 09728734 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-08 [patent_title] => 'Aligned carbon nanotubes for use in high performance field effect transistors' [patent_app_type] => utility [patent_app_number] => 15/154170 [patent_app_country] => US [patent_app_date] => 2016-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 9619 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15154170 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/154170
Aligned carbon nanotubes for use in high performance field effect transistors May 12, 2016 Issued
Array ( [id] => 11681243 [patent_doc_number] => 09679778 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-13 [patent_title] => 'Methods of forming memory cells with air gaps and other low dielectric constant materials' [patent_app_type] => utility [patent_app_number] => 15/154467 [patent_app_country] => US [patent_app_date] => 2016-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 8058 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15154467 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/154467
Methods of forming memory cells with air gaps and other low dielectric constant materials May 12, 2016 Issued
Array ( [id] => 11273876 [patent_doc_number] => 20160336423 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-17 [patent_title] => 'METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/152673 [patent_app_country] => US [patent_app_date] => 2016-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2663 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15152673 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/152673
METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE May 11, 2016 Abandoned
Array ( [id] => 13293153 [patent_doc_number] => 10157777 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-18 [patent_title] => Air gap over transistor gate and related method [patent_app_type] => utility [patent_app_number] => 15/152797 [patent_app_country] => US [patent_app_date] => 2016-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 5632 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15152797 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/152797
Air gap over transistor gate and related method May 11, 2016 Issued
Array ( [id] => 11424867 [patent_doc_number] => 20170033013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-02 [patent_title] => 'Integrated Circuit Devices and Methods of Manufacturing the Same' [patent_app_type] => utility [patent_app_number] => 15/152815 [patent_app_country] => US [patent_app_date] => 2016-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 13457 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15152815 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/152815
Integrated circuit devices and methods of manufacturing the same May 11, 2016 Issued
Array ( [id] => 11847794 [patent_doc_number] => 09735354 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-15 [patent_title] => 'Forming resistive random access memories together with fuse arrays' [patent_app_type] => utility [patent_app_number] => 15/153293 [patent_app_country] => US [patent_app_date] => 2016-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 29 [patent_no_of_words] => 5200 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15153293 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/153293
Forming resistive random access memories together with fuse arrays May 11, 2016 Issued
Array ( [id] => 12741211 [patent_doc_number] => 20180138904 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-17 [patent_title] => POWER TRANSISTOR DRIVING APPARATUS [patent_app_type] => utility [patent_app_number] => 15/570399 [patent_app_country] => US [patent_app_date] => 2016-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5046 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15570399 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/570399
Power transistor driving apparatus May 11, 2016 Issued
Array ( [id] => 12250090 [patent_doc_number] => 09922872 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-20 [patent_title] => 'Tungsten films by organometallic or silane pre-treatment of substrate' [patent_app_type] => utility [patent_app_number] => 15/151612 [patent_app_country] => US [patent_app_date] => 2016-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5345 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15151612 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/151612
Tungsten films by organometallic or silane pre-treatment of substrate May 10, 2016 Issued
Array ( [id] => 16339192 [patent_doc_number] => 10790160 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-29 [patent_title] => Barrier configurations and processes in layer structures [patent_app_type] => utility [patent_app_number] => 15/152544 [patent_app_country] => US [patent_app_date] => 2016-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 81 [patent_no_of_words] => 15193 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15152544 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/152544
Barrier configurations and processes in layer structures May 10, 2016 Issued
Array ( [id] => 11339491 [patent_doc_number] => 20160365247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-15 [patent_title] => 'METHOD OF FABRICATING TRANSIENT SEMICONDUCTOR BASED ON SINGLE-WALL NANOTUBE' [patent_app_type] => utility [patent_app_number] => 15/152121 [patent_app_country] => US [patent_app_date] => 2016-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5176 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15152121 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/152121
Method of fabricating transient semiconductor based on single-wall nanotube May 10, 2016 Issued
Array ( [id] => 11273646 [patent_doc_number] => 20160336193 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-17 [patent_title] => 'METHOD OF FORMING PATTERN AND METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE BY USING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/152096 [patent_app_country] => US [patent_app_date] => 2016-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 59 [patent_figures_cnt] => 59 [patent_no_of_words] => 14161 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15152096 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/152096
Method of forming pattern and method of manufacturing integrated circuit device by using the same May 10, 2016 Issued
Array ( [id] => 11466758 [patent_doc_number] => 09583397 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-28 [patent_title] => 'Source/drain terminal contact and method of forming same' [patent_app_type] => utility [patent_app_number] => 15/151720 [patent_app_country] => US [patent_app_date] => 2016-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 28 [patent_no_of_words] => 7855 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15151720 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/151720
Source/drain terminal contact and method of forming same May 10, 2016 Issued
Array ( [id] => 11660223 [patent_doc_number] => 09673234 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-06 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 15/151539 [patent_app_country] => US [patent_app_date] => 2016-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 88 [patent_no_of_words] => 30829 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15151539 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/151539
Semiconductor device May 10, 2016 Issued
Array ( [id] => 11883733 [patent_doc_number] => 09754914 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-09-05 [patent_title] => 'Method to provide die attach stress relief using gold stud bumps' [patent_app_type] => utility [patent_app_number] => 15/151160 [patent_app_country] => US [patent_app_date] => 2016-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1968 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15151160 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/151160
Method to provide die attach stress relief using gold stud bumps May 9, 2016 Issued
Array ( [id] => 12329739 [patent_doc_number] => 09945903 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-17 [patent_title] => Semiconductor device manufacturing method [patent_app_type] => utility [patent_app_number] => 15/151152 [patent_app_country] => US [patent_app_date] => 2016-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 12745 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15151152 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/151152
Semiconductor device manufacturing method May 9, 2016 Issued
Array ( [id] => 11398149 [patent_doc_number] => 20170018685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-19 [patent_title] => 'METHOD OF MANUFACTURING LIGHT-EMITTING DIODE' [patent_app_type] => utility [patent_app_number] => 15/151017 [patent_app_country] => US [patent_app_date] => 2016-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 18509 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15151017 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/151017
METHOD OF MANUFACTURING LIGHT-EMITTING DIODE May 9, 2016 Abandoned
Array ( [id] => 11432126 [patent_doc_number] => 09570451 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-14 [patent_title] => 'Method to form semiconductor devices' [patent_app_type] => utility [patent_app_number] => 15/151483 [patent_app_country] => US [patent_app_date] => 2016-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 7382 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15151483 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/151483
Method to form semiconductor devices May 9, 2016 Issued
Array ( [id] => 11811467 [patent_doc_number] => 09716039 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-25 [patent_title] => 'Wafer processing method' [patent_app_type] => utility [patent_app_number] => 15/151143 [patent_app_country] => US [patent_app_date] => 2016-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 5370 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15151143 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/151143
Wafer processing method May 9, 2016 Issued
Array ( [id] => 11432022 [patent_doc_number] => 09570346 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-14 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 15/150785 [patent_app_country] => US [patent_app_date] => 2016-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 6381 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15150785 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/150785
Method of manufacturing semiconductor device May 9, 2016 Issued
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