Search

Jafar F. Parsa

Examiner (ID: 11740, Phone: (571)272-0643 , Office: P/1671 )

Most Active Art Unit
1621
Art Unit(s)
1671, 1621, 1622, 1692
Total Applications
2798
Issued Applications
2233
Pending Applications
309
Abandoned Applications
289

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6979645 [patent_doc_number] => 20050289363 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-29 [patent_title] => 'Method and apparatus for automatic realtime power management' [patent_app_type] => utility [patent_app_number] => 10/879927 [patent_app_country] => US [patent_app_date] => 2004-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3661 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0289/20050289363.pdf [firstpage_image] =>[orig_patent_app_number] => 10879927 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/879927
Method and apparatus for automatic realtime power management Jun 27, 2004 Abandoned
Array ( [id] => 7057385 [patent_doc_number] => 20050278560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-15 [patent_title] => 'Method for testing and verifying power management features of computer system' [patent_app_type] => utility [patent_app_number] => 10/866658 [patent_app_country] => US [patent_app_date] => 2004-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2656 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0278/20050278560.pdf [firstpage_image] =>[orig_patent_app_number] => 10866658 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/866658
Method for testing and verifying power management features of computer system Jun 14, 2004 Issued
Array ( [id] => 6990023 [patent_doc_number] => 20050089060 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-28 [patent_title] => 'Method and apparatus for a variable processing period in an integrated circuit' [patent_app_type] => utility [patent_app_number] => 10/861682 [patent_app_country] => US [patent_app_date] => 2004-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4530 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20050089060.pdf [firstpage_image] =>[orig_patent_app_number] => 10861682 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/861682
Method and apparatus for a variable processing period in an integrated circuit Jun 3, 2004 Issued
Array ( [id] => 690984 [patent_doc_number] => 07080276 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-07-18 [patent_title] => 'Circuit and method for automatically selecting clock modes' [patent_app_type] => utility [patent_app_number] => 10/858023 [patent_app_country] => US [patent_app_date] => 2004-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2802 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/080/07080276.pdf [firstpage_image] =>[orig_patent_app_number] => 10858023 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/858023
Circuit and method for automatically selecting clock modes May 31, 2004 Issued
Array ( [id] => 593895 [patent_doc_number] => 07461282 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-02 [patent_title] => 'System and method for generating multiple independent, synchronized local timestamps' [patent_app_type] => utility [patent_app_number] => 10/848160 [patent_app_country] => US [patent_app_date] => 2004-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3599 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/461/07461282.pdf [firstpage_image] =>[orig_patent_app_number] => 10848160 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/848160
System and method for generating multiple independent, synchronized local timestamps May 18, 2004 Issued
Array ( [id] => 200914 [patent_doc_number] => 07640446 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-12-29 [patent_title] => 'System-on-chip power reduction through dynamic clock frequency' [patent_app_type] => utility [patent_app_number] => 10/845028 [patent_app_country] => US [patent_app_date] => 2004-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4262 [patent_no_of_claims] => 76 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/640/07640446.pdf [firstpage_image] =>[orig_patent_app_number] => 10845028 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/845028
System-on-chip power reduction through dynamic clock frequency May 12, 2004 Issued
Array ( [id] => 297887 [patent_doc_number] => 07543166 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-02 [patent_title] => 'System for managing power states of a virtual machine based on global power management policy and power management command sent by the virtual machine' [patent_app_type] => utility [patent_app_number] => 10/844780 [patent_app_country] => US [patent_app_date] => 2004-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3364 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/543/07543166.pdf [firstpage_image] =>[orig_patent_app_number] => 10844780 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/844780
System for managing power states of a virtual machine based on global power management policy and power management command sent by the virtual machine May 11, 2004 Issued
Array ( [id] => 6916941 [patent_doc_number] => 20050094502 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-05 [patent_title] => 'Circuit, system and method for starting up plural devices in an orderly manner' [patent_app_type] => utility [patent_app_number] => 10/839631 [patent_app_country] => US [patent_app_date] => 2004-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2174 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20050094502.pdf [firstpage_image] =>[orig_patent_app_number] => 10839631 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/839631
Circuit, system and method for starting up plural devices in an orderly manner May 3, 2004 Abandoned
Array ( [id] => 498121 [patent_doc_number] => 07216223 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-08 [patent_title] => 'Configuring multi-thread status' [patent_app_type] => utility [patent_app_number] => 10/836987 [patent_app_country] => US [patent_app_date] => 2004-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4419 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/216/07216223.pdf [firstpage_image] =>[orig_patent_app_number] => 10836987 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/836987
Configuring multi-thread status Apr 29, 2004 Issued
Array ( [id] => 7063440 [patent_doc_number] => 20050005177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-06 [patent_title] => 'Computer system and adapter conserving battery power and method thereof' [patent_app_type] => utility [patent_app_number] => 10/834065 [patent_app_country] => US [patent_app_date] => 2004-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2259 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20050005177.pdf [firstpage_image] =>[orig_patent_app_number] => 10834065 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/834065
Computer system and adapter conserving battery power and method thereof Apr 28, 2004 Abandoned
Array ( [id] => 820067 [patent_doc_number] => 07412614 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-12 [patent_title] => 'Power management using a pre-determined thermal characteristic of a memory module' [patent_app_type] => utility [patent_app_number] => 10/836018 [patent_app_country] => US [patent_app_date] => 2004-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2380 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/412/07412614.pdf [firstpage_image] =>[orig_patent_app_number] => 10836018 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/836018
Power management using a pre-determined thermal characteristic of a memory module Apr 28, 2004 Issued
Array ( [id] => 7384987 [patent_doc_number] => 20040221147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-04 [patent_title] => 'Method for updating BIOS' [patent_app_type] => new [patent_app_number] => 10/834259 [patent_app_country] => US [patent_app_date] => 2004-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 2136 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0221/20040221147.pdf [firstpage_image] =>[orig_patent_app_number] => 10834259 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/834259
Method for updating BIOS Apr 28, 2004 Abandoned
Array ( [id] => 914643 [patent_doc_number] => 07330987 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-12 [patent_title] => 'System for controlling power of an electronic device based on a type of power source being used and a type of network being connected to' [patent_app_type] => utility [patent_app_number] => 10/819210 [patent_app_country] => US [patent_app_date] => 2004-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3179 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/330/07330987.pdf [firstpage_image] =>[orig_patent_app_number] => 10819210 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/819210
System for controlling power of an electronic device based on a type of power source being used and a type of network being connected to Apr 6, 2004 Issued
Array ( [id] => 518886 [patent_doc_number] => 07203857 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-10 [patent_title] => 'On-demand clock switching' [patent_app_type] => utility [patent_app_number] => 10/809697 [patent_app_country] => US [patent_app_date] => 2004-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4619 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/203/07203857.pdf [firstpage_image] =>[orig_patent_app_number] => 10809697 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/809697
On-demand clock switching Mar 25, 2004 Issued
Array ( [id] => 418228 [patent_doc_number] => 07281148 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-09 [patent_title] => 'Power managed busses and arbitration' [patent_app_type] => utility [patent_app_number] => 10/809970 [patent_app_country] => US [patent_app_date] => 2004-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1269 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/281/07281148.pdf [firstpage_image] =>[orig_patent_app_number] => 10809970 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/809970
Power managed busses and arbitration Mar 25, 2004 Issued
Array ( [id] => 933269 [patent_doc_number] => 06981071 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-27 [patent_title] => 'Multi-function interface module' [patent_app_type] => utility [patent_app_number] => 10/793826 [patent_app_country] => US [patent_app_date] => 2004-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5309 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/981/06981071.pdf [firstpage_image] =>[orig_patent_app_number] => 10793826 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/793826
Multi-function interface module Mar 7, 2004 Issued
Array ( [id] => 6946806 [patent_doc_number] => 20050198542 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-08 [patent_title] => 'Method and apparatus for a variable memory enable deassertion wait time' [patent_app_type] => utility [patent_app_number] => 10/796366 [patent_app_country] => US [patent_app_date] => 2004-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3212 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20050198542.pdf [firstpage_image] =>[orig_patent_app_number] => 10796366 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/796366
Method and apparatus for a variable memory enable deassertion wait time Mar 7, 2004 Abandoned
Array ( [id] => 6973952 [patent_doc_number] => 20050039062 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-17 [patent_title] => 'Computer system and method' [patent_app_type] => utility [patent_app_number] => 10/794394 [patent_app_country] => US [patent_app_date] => 2004-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3518 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20050039062.pdf [firstpage_image] =>[orig_patent_app_number] => 10794394 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/794394
Computer system and method Mar 4, 2004 Abandoned
Array ( [id] => 427860 [patent_doc_number] => 07272736 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-18 [patent_title] => 'Method and system for fast frequency switch for a power throttle in an integrated device' [patent_app_type] => utility [patent_app_number] => 10/794735 [patent_app_country] => US [patent_app_date] => 2004-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4610 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/272/07272736.pdf [firstpage_image] =>[orig_patent_app_number] => 10794735 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/794735
Method and system for fast frequency switch for a power throttle in an integrated device Mar 2, 2004 Issued
Array ( [id] => 7052345 [patent_doc_number] => 20050188064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-25 [patent_title] => 'Using a configuration mode for partition management in server platforms' [patent_app_type] => utility [patent_app_number] => 10/787869 [patent_app_country] => US [patent_app_date] => 2004-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2045 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20050188064.pdf [firstpage_image] =>[orig_patent_app_number] => 10787869 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/787869
Using a configuration mode for partition management in server platforms Feb 23, 2004 Abandoned
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