Search

Jafar F. Parsa

Examiner (ID: 11740, Phone: (571)272-0643 , Office: P/1671 )

Most Active Art Unit
1621
Art Unit(s)
1671, 1621, 1622, 1692
Total Applications
2798
Issued Applications
2233
Pending Applications
309
Abandoned Applications
289

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1116702 [patent_doc_number] => 06804788 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-10-12 [patent_title] => 'System for controlling a switchmode power supply in a computer system by first coarsely and then finely adjusting a time-length signal' [patent_app_type] => B1 [patent_app_number] => 09/632179 [patent_app_country] => US [patent_app_date] => 2000-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4338 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/804/06804788.pdf [firstpage_image] =>[orig_patent_app_number] => 09632179 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/632179
System for controlling a switchmode power supply in a computer system by first coarsely and then finely adjusting a time-length signal Aug 2, 2000 Issued
Array ( [id] => 1170118 [patent_doc_number] => 06763474 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-13 [patent_title] => 'System for synchronizing nodes in a heterogeneous computer system by using multistage frequency synthesizer to dynamically adjust clock frequency of the nodes' [patent_app_type] => B1 [patent_app_number] => 09/631712 [patent_app_country] => US [patent_app_date] => 2000-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4313 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/763/06763474.pdf [firstpage_image] =>[orig_patent_app_number] => 09631712 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/631712
System for synchronizing nodes in a heterogeneous computer system by using multistage frequency synthesizer to dynamically adjust clock frequency of the nodes Aug 2, 2000 Issued
Array ( [id] => 1236411 [patent_doc_number] => 06694446 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-17 [patent_title] => 'System for synchronizing a microprocessor with an asynchronous event by detecting an awaited event occurs and immediately applying load signal to a counter thereafter' [patent_app_type] => B1 [patent_app_number] => 09/631395 [patent_app_country] => US [patent_app_date] => 2000-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4963 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/694/06694446.pdf [firstpage_image] =>[orig_patent_app_number] => 09631395 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/631395
System for synchronizing a microprocessor with an asynchronous event by detecting an awaited event occurs and immediately applying load signal to a counter thereafter Aug 2, 2000 Issued
Array ( [id] => 146741 [patent_doc_number] => 07694115 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-04-06 [patent_title] => 'Network-based alert management system' [patent_app_type] => utility [patent_app_number] => 09/629510 [patent_app_country] => US [patent_app_date] => 2000-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4684 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/694/07694115.pdf [firstpage_image] =>[orig_patent_app_number] => 09629510 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/629510
Network-based alert management system Jul 31, 2000 Issued
Array ( [id] => 1319287 [patent_doc_number] => 06618816 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-09 [patent_title] => 'System for compensating delay of high-speed data by equalizing and determining the total phase-shift of data relative to the phase of clock signal transmitted via separate path' [patent_app_type] => B1 [patent_app_number] => 09/624948 [patent_app_country] => US [patent_app_date] => 2000-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3430 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/618/06618816.pdf [firstpage_image] =>[orig_patent_app_number] => 09624948 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/624948
System for compensating delay of high-speed data by equalizing and determining the total phase-shift of data relative to the phase of clock signal transmitted via separate path Jul 24, 2000 Issued
Array ( [id] => 1225852 [patent_doc_number] => 06704874 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-09 [patent_title] => 'Network-based alert management' [patent_app_type] => B1 [patent_app_number] => 09/626547 [patent_app_country] => US [patent_app_date] => 2000-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4595 [patent_no_of_claims] => 57 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/704/06704874.pdf [firstpage_image] =>[orig_patent_app_number] => 09626547 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/626547
Network-based alert management Jul 24, 2000 Issued
Array ( [id] => 1553707 [patent_doc_number] => 06347343 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-12 [patent_title] => 'High speed file I/O control system with user set file structure to effect parallel access pattern over a network' [patent_app_type] => B1 [patent_app_number] => 09/613817 [patent_app_country] => US [patent_app_date] => 2000-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 8646 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 301 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/347/06347343.pdf [firstpage_image] =>[orig_patent_app_number] => 09613817 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/613817
High speed file I/O control system with user set file structure to effect parallel access pattern over a network Jul 9, 2000 Issued
Array ( [id] => 684813 [patent_doc_number] => 07085938 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-08-01 [patent_title] => 'Protective relay with embedded web server' [patent_app_type] => utility [patent_app_number] => 09/605010 [patent_app_country] => US [patent_app_date] => 2000-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2649 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/085/07085938.pdf [firstpage_image] =>[orig_patent_app_number] => 09605010 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/605010
Protective relay with embedded web server Jun 26, 2000 Issued
Array ( [id] => 1260582 [patent_doc_number] => 06668334 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-23 [patent_title] => 'Apparatus for detecting clock failure within a fixed number of cycles of the clock' [patent_app_type] => B1 [patent_app_number] => 09/604842 [patent_app_country] => US [patent_app_date] => 2000-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 5854 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/668/06668334.pdf [firstpage_image] =>[orig_patent_app_number] => 09604842 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/604842
Apparatus for detecting clock failure within a fixed number of cycles of the clock Jun 26, 2000 Issued
Array ( [id] => 1243194 [patent_doc_number] => 06684337 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-27 [patent_title] => 'Charging system incorporated in computer for charging and resetting wireless peripheral devices' [patent_app_type] => B1 [patent_app_number] => 09/604409 [patent_app_country] => US [patent_app_date] => 2000-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1358 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/684/06684337.pdf [firstpage_image] =>[orig_patent_app_number] => 09604409 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/604409
Charging system incorporated in computer for charging and resetting wireless peripheral devices Jun 26, 2000 Issued
09/529739 Byte alignment method and apparatus Jun 25, 2000 Abandoned
Array ( [id] => 1166635 [patent_doc_number] => 06772356 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-03 [patent_title] => 'System for specifying core voltage for a microprocessor by selectively outputting one of a first, fixed and a second, variable voltage control settings from the microprocessor' [patent_app_type] => B1 [patent_app_number] => 09/603511 [patent_app_country] => US [patent_app_date] => 2000-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3758 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/772/06772356.pdf [firstpage_image] =>[orig_patent_app_number] => 09603511 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/603511
System for specifying core voltage for a microprocessor by selectively outputting one of a first, fixed and a second, variable voltage control settings from the microprocessor Jun 25, 2000 Issued
Array ( [id] => 7962189 [patent_doc_number] => 06681335 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-20 [patent_title] => 'System for controlling power plane of a printed circuit board by using a single voltage regulator to control switches during first and second power modes' [patent_app_type] => B1 [patent_app_number] => 09/604683 [patent_app_country] => US [patent_app_date] => 2000-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3154 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/681/06681335.pdf [firstpage_image] =>[orig_patent_app_number] => 09604683 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/604683
System for controlling power plane of a printed circuit board by using a single voltage regulator to control switches during first and second power modes Jun 25, 2000 Issued
Array ( [id] => 1250271 [patent_doc_number] => 06675295 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-06 [patent_title] => 'Method and computer system for detecting and correcting a failure in a computer application program during startup' [patent_app_type] => B1 [patent_app_number] => 09/596591 [patent_app_country] => US [patent_app_date] => 2000-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6183 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/675/06675295.pdf [firstpage_image] =>[orig_patent_app_number] => 09596591 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/596591
Method and computer system for detecting and correcting a failure in a computer application program during startup Jun 18, 2000 Issued
Array ( [id] => 7626815 [patent_doc_number] => 06807629 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-10-19 [patent_title] => 'Apparatus and method for accessing POST 80h codes via a computer port' [patent_app_type] => B1 [patent_app_number] => 09/570984 [patent_app_country] => US [patent_app_date] => 2000-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1397 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 4 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/807/06807629.pdf [firstpage_image] =>[orig_patent_app_number] => 09570984 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/570984
Apparatus and method for accessing POST 80h codes via a computer port May 14, 2000 Issued
Array ( [id] => 1186708 [patent_doc_number] => 06738915 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-18 [patent_title] => 'System for supplying multiple voltages to devices on circuit board through a sequencing in a predictable sequence' [patent_app_type] => B1 [patent_app_number] => 09/569535 [patent_app_country] => US [patent_app_date] => 2000-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3860 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/738/06738915.pdf [firstpage_image] =>[orig_patent_app_number] => 09569535 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/569535
System for supplying multiple voltages to devices on circuit board through a sequencing in a predictable sequence May 11, 2000 Issued
Array ( [id] => 1221788 [patent_doc_number] => 06708277 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-16 [patent_title] => 'Method and system for parallel bus stepping using dynamic signal grouping' [patent_app_type] => B1 [patent_app_number] => 09/571311 [patent_app_country] => US [patent_app_date] => 2000-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3209 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/708/06708277.pdf [firstpage_image] =>[orig_patent_app_number] => 09571311 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/571311
Method and system for parallel bus stepping using dynamic signal grouping May 11, 2000 Issued
Array ( [id] => 1258289 [patent_doc_number] => 06671756 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-30 [patent_title] => 'KVM switch having a uniprocessor that accomodate multiple users and multiple computers' [patent_app_type] => B1 [patent_app_number] => 09/564793 [patent_app_country] => US [patent_app_date] => 2000-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 12428 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/671/06671756.pdf [firstpage_image] =>[orig_patent_app_number] => 09564793 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/564793
KVM switch having a uniprocessor that accomodate multiple users and multiple computers May 4, 2000 Issued
Array ( [id] => 981722 [patent_doc_number] => 06931553 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-08-16 [patent_title] => 'Preventing general purpose event interrupt storms in a computer system' [patent_app_type] => utility [patent_app_number] => 09/552944 [patent_app_country] => US [patent_app_date] => 2000-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 10585 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/931/06931553.pdf [firstpage_image] =>[orig_patent_app_number] => 09552944 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/552944
Preventing general purpose event interrupt storms in a computer system Apr 19, 2000 Issued
Array ( [id] => 1196786 [patent_doc_number] => 06732176 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-04 [patent_title] => 'Distributed network communication system which enables multiple network providers to use a common distributed network infrastructure' [patent_app_type] => B1 [patent_app_number] => 09/551291 [patent_app_country] => US [patent_app_date] => 2000-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 11119 [patent_no_of_claims] => 117 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/732/06732176.pdf [firstpage_image] =>[orig_patent_app_number] => 09551291 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/551291
Distributed network communication system which enables multiple network providers to use a common distributed network infrastructure Apr 17, 2000 Issued
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