Jafar F. Parsa

Array ( [id] => 739793 [patent_doc_number] => 07039821 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-05-02 [patent_title] => 'Hardware for configuring and delivering power' [patent_app_type] => utility [patent_app_number] => 09/475946 [patent_app_country] => US [patent_app_date] => 1999-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 49 [patent_no_of_words] => 52569 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/039/07039821.pdf [firstpage_image] =>[orig_patent_app_number] => 09475946 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1361813 [patent_doc_number] => 06587957 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-01 [patent_title] => 'Disk drive controller for controlling data flow therethrough by switching to secondary bus to receive clock pulses when a failure on master bus is detected' [patent_app_type] => B1 [patent_app_number] => 09/475462 [patent_app_country] => US [patent_app_date] => 1999-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2680 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/587/06587957.pdf [firstpage_image] =>[orig_patent_app_number] => 09475462 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1297339 [patent_doc_number] => 06633992 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-14 [patent_title] => 'Generalized pre-charge clock circuit for pulsed domino gates' [patent_app_type] => B1 [patent_app_number] => 09/476412 [patent_app_country] => US [patent_app_date] => 1999-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2666 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/633/06633992.pdf [firstpage_image] =>[orig_patent_app_number] => 09476412 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1240919 [patent_doc_number] => 06691241 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-10 [patent_title] => 'Delay tuning to improve timing in multi-load systems' [patent_app_type] => B1 [patent_app_number] => 09/469848 [patent_app_country] => US [patent_app_date] => 1999-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 3933 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/691/06691241.pdf [firstpage_image] =>[orig_patent_app_number] => 09469848 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7625708 [patent_doc_number] => 06769059 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-27 [patent_title] => 'System for updating computer\'s existing video BIOS without updating the whole computer\'s system BIOS' [patent_app_type] => B1 [patent_app_number] => 09/466597 [patent_app_country] => US [patent_app_date] => 1999-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1651 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/769/06769059.pdf [firstpage_image] =>[orig_patent_app_number] => 09466597 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1432411 [patent_doc_number] => 06505303 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-07 [patent_title] => 'Communications node, information equipment including the same and network system' [patent_app_type] => B1 [patent_app_number] => 09/464769 [patent_app_country] => US [patent_app_date] => 1999-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 25 [patent_no_of_words] => 11438 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/505/06505303.pdf [firstpage_image] =>[orig_patent_app_number] => 09464769 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1298216 [patent_doc_number] => 06631468 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-07 [patent_title] => 'Bootable packet written re-writable optical disc and methods for making same' [patent_app_type] => B1 [patent_app_number] => 09/464332 [patent_app_country] => US [patent_app_date] => 1999-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6693 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/631/06631468.pdf [firstpage_image] =>[orig_patent_app_number] => 09464332 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1357312 [patent_doc_number] => 06591363 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-08 [patent_title] => 'System for writing incremental packet data to create bootable optical medium by writing boot catalog and boot image onto second track before writing volume descriptors onto first track' [patent_app_type] => B1 [patent_app_number] => 09/464325 [patent_app_country] => US [patent_app_date] => 1999-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5381 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/591/06591363.pdf [firstpage_image] =>[orig_patent_app_number] => 09464325 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7623809 [patent_doc_number] => 06725368 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-20 [patent_title] => 'System for executing a post having primary and secondary subsets, wherein the secondary subset is executed subsequently to the primary subset in the background setting' [patent_app_type] => B1 [patent_app_number] => 09/458247 [patent_app_country] => US [patent_app_date] => 1999-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3133 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/725/06725368.pdf [firstpage_image] =>[orig_patent_app_number] => 09458247 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 981660 [patent_doc_number] => 06931523 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-08-16 [patent_title] => 'System and method for re-storing stored known-good computer configuration via a non-interactive user input device without re-booting the system' [patent_app_type] => utility [patent_app_number] => 09/457841 [patent_app_country] => US [patent_app_date] => 1999-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3602 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/931/06931523.pdf [firstpage_image] =>[orig_patent_app_number] => 09457841 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1418451 [patent_doc_number] => 06546440 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-08 [patent_title] => 'Optical drive controller with a host interface for direct connection to an IDE/ATA data bus' [patent_app_type] => B1 [patent_app_number] => 09/442866 [patent_app_country] => US [patent_app_date] => 1999-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 87 [patent_no_of_words] => 16680 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/546/06546440.pdf [firstpage_image] =>[orig_patent_app_number] => 09442866 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1430485 [patent_doc_number] => 06526504 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-25 [patent_title] => 'System and method for sizing computer systems with variable ramp-up periods by calculating a throughput for target configuration based on data obtained from a computer subsystem' [patent_app_type] => B1 [patent_app_number] => 09/442654 [patent_app_country] => US [patent_app_date] => 1999-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6517 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/526/06526504.pdf [firstpage_image] =>[orig_patent_app_number] => 09442654 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7631529 [patent_doc_number] => 06665808 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-16 [patent_title] => 'System for generating timing signal varying over time from an ideal signal by combining nominal parameter value signal and parameter variation value signal' [patent_app_type] => B1 [patent_app_number] => 09/439001 [patent_app_country] => US [patent_app_date] => 1999-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2253 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/665/06665808.pdf [firstpage_image] =>[orig_patent_app_number] => 09439001 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1407346 [patent_doc_number] => 06560716 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-06 [patent_title] => 'System for measuring delay of digital signal using clock generator and delay unit wherein a set of digital elements of clock generator identical to a set of digital elements of delay unit' [patent_app_type] => B1 [patent_app_number] => 09/437464 [patent_app_country] => US [patent_app_date] => 1999-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 6378 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/560/06560716.pdf [firstpage_image] =>[orig_patent_app_number] => 09437464 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1521798 [patent_doc_number] => 06502196 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-31 [patent_title] => 'Voltage converter for applying suspension voltage to a RAM when resume signal is low while suspension-to-RAM signal is high, and applying source voltage in a reverse condition' [patent_app_type] => B1 [patent_app_number] => 09/436590 [patent_app_country] => US [patent_app_date] => 1999-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2861 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/502/06502196.pdf [firstpage_image] =>[orig_patent_app_number] => 09436590 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1423821 [patent_doc_number] => 06539487 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-25 [patent_title] => 'System for dynamically selecting maximum number of accessible banks of memory per cycle by monitoring actual power to each of the banks to determine the number of accessible banks' [patent_app_type] => B1 [patent_app_number] => 09/436958 [patent_app_country] => US [patent_app_date] => 1999-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2566 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/539/06539487.pdf [firstpage_image] =>[orig_patent_app_number] => 09436958 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1495234 [patent_doc_number] => 06418494 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-09 [patent_title] => 'Split computer architecture to separate user and processor while retaining original user interface' [patent_app_type] => B1 [patent_app_number] => 09/430163 [patent_app_country] => US [patent_app_date] => 1999-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 24 [patent_no_of_words] => 13653 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/418/06418494.pdf [firstpage_image] =>[orig_patent_app_number] => 09430163 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1357383 [patent_doc_number] => 06591369 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-08 [patent_title] => 'System and method for communicating with an integrated circuit' [patent_app_type] => B1 [patent_app_number] => 09/410638 [patent_app_country] => US [patent_app_date] => 1999-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 16192 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/591/06591369.pdf [firstpage_image] =>[orig_patent_app_number] => 09410638 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4312012 [patent_doc_number] => 06237052 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-22 [patent_title] => 'On-the-fly redundancy operation for forming redundant drive data and reconstructing missing data as data transferred between buffer memory and disk drives during write and read operation respectively' [patent_app_type] => 1 [patent_app_number] => 9/411698 [patent_app_country] => US [patent_app_date] => 1999-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 8655 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/237/06237052.pdf [firstpage_image] =>[orig_patent_app_number] => 411698 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4424020 [patent_doc_number] => 06301626 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-09 [patent_title] => 'System for dynamic configuration of an input device by downloading an input device layout from server if the layout is not already display on the input device' [patent_app_type] => 1 [patent_app_number] => 9/406840 [patent_app_country] => US [patent_app_date] => 1999-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4223 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/301/06301626.pdf [firstpage_image] =>[orig_patent_app_number] => 406840 [rel_patent_id] =>[rel_patent_doc_number] =>)