
James J. Bell
Examiner (ID: 12275)
| Most Active Art Unit | 1504 |
| Art Unit(s) | 1504, 1314, 1754, 2899, 1771 |
| Total Applications | 2528 |
| Issued Applications | 2272 |
| Pending Applications | 36 |
| Abandoned Applications | 220 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18198250
[patent_doc_number] => 20230051769
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-02-16
[patent_title] => MICRO COMPONENT STRUCTURE AND MANUFACTURING METHOD THEREOF, AND TRANSFER METHOD FOR LIGHT-EMITTING DIODE CHIP
[patent_app_type] => utility
[patent_app_number] => 17/720674
[patent_app_country] => US
[patent_app_date] => 2022-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7089
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17720674
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/720674 | Micro component structure and manufacturing method thereof, and transfer method for light-emitting diode chip | Apr 13, 2022 | Issued |
Array
(
[id] => 18623964
[patent_doc_number] => 11757022
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-09-12
[patent_title] => Parasitic capacitance reduction
[patent_app_type] => utility
[patent_app_number] => 17/717777
[patent_app_country] => US
[patent_app_date] => 2022-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 7829
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17717777
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/717777 | Parasitic capacitance reduction | Apr 10, 2022 | Issued |
Array
(
[id] => 18698493
[patent_doc_number] => 20230328973
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-12
[patent_title] => THREE-DIMENSIONAL MEMORY DEVICE INCLUDING AN ISOLATION-TRENCH ETCH STOP LAYER AND METHODS FOR FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/716698
[patent_app_country] => US
[patent_app_date] => 2022-04-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16040
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17716698
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/716698 | Three-dimensional memory device including an isolation-trench etch stop layer and methods for forming the same | Apr 7, 2022 | Issued |
Array
(
[id] => 17764965
[patent_doc_number] => 20220238578
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-07-28
[patent_title] => DETECTION DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/714478
[patent_app_country] => US
[patent_app_date] => 2022-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9482
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 229
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17714478
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/714478 | Detection device | Apr 5, 2022 | Issued |
Array
(
[id] => 18679927
[patent_doc_number] => 20230317585
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-05
[patent_title] => PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/709470
[patent_app_country] => US
[patent_app_date] => 2022-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 21816
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17709470
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/709470 | Package structure and manufacturing method thereof | Mar 30, 2022 | Issued |
Array
(
[id] => 18623902
[patent_doc_number] => 11756958
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-09-12
[patent_title] => Semiconductor device structure and methods of forming the same
[patent_app_type] => utility
[patent_app_number] => 17/708769
[patent_app_country] => US
[patent_app_date] => 2022-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 48
[patent_figures_cnt] => 57
[patent_no_of_words] => 9212
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17708769
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/708769 | Semiconductor device structure and methods of forming the same | Mar 29, 2022 | Issued |
Array
(
[id] => 18840163
[patent_doc_number] => 11848242
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-12-19
[patent_title] => Method of manufacturing a semiconductor device and a semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/706362
[patent_app_country] => US
[patent_app_date] => 2022-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 94
[patent_figures_cnt] => 236
[patent_no_of_words] => 19586
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17706362
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/706362 | Method of manufacturing a semiconductor device and a semiconductor device | Mar 27, 2022 | Issued |
Array
(
[id] => 18542747
[patent_doc_number] => 20230247865
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-08-03
[patent_title] => DISPLAY PANEL AND DISPLAY APPARATUS
[patent_app_type] => utility
[patent_app_number] => 17/704777
[patent_app_country] => US
[patent_app_date] => 2022-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9031
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 315
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17704777
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/704777 | Display panel and display apparatus | Mar 24, 2022 | Issued |
Array
(
[id] => 18906039
[patent_doc_number] => 20240021524
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-01-18
[patent_title] => SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 18/284028
[patent_app_country] => US
[patent_app_date] => 2022-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 24303
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18284028
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/284028 | SEMICONDUCTOR PACKAGE | Mar 24, 2022 | Pending |
Array
(
[id] => 20404460
[patent_doc_number] => 12494441
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-12-09
[patent_title] => BGA stiffener attachment with low Eolife adhesive strength at high solder joint stress area generated from enabling load
[patent_app_type] => utility
[patent_app_number] => 17/703768
[patent_app_country] => US
[patent_app_date] => 2022-03-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 16
[patent_no_of_words] => 1134
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 56
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17703768
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/703768 | BGA stiffener attachment with low Eolife adhesive strength at high solder joint stress area generated from enabling load | Mar 23, 2022 | Issued |
Array
(
[id] => 18122801
[patent_doc_number] => 20230008409
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-01-12
[patent_title] => TRANSISTORS HAVING TWO-DIMENSIONAL SEMICONDUCTOR CHANNELS
[patent_app_type] => utility
[patent_app_number] => 17/702637
[patent_app_country] => US
[patent_app_date] => 2022-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12153
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17702637
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/702637 | Transistors having two-dimensional semiconductor channels | Mar 22, 2022 | Issued |
Array
(
[id] => 17810969
[patent_doc_number] => 20220262804
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-08-18
[patent_title] => SEMICONDUCTOR DEVICE WITH AIR GAP BETWEEN CONDUCTIVE FEATURES
[patent_app_type] => utility
[patent_app_number] => 17/701972
[patent_app_country] => US
[patent_app_date] => 2022-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7007
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17701972
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/701972 | Semiconductor device with air gap between conductive features | Mar 22, 2022 | Issued |
Array
(
[id] => 19907809
[patent_doc_number] => 12284839
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-04-22
[patent_title] => Dual depth junction structures and process methods
[patent_app_type] => utility
[patent_app_number] => 17/700858
[patent_app_country] => US
[patent_app_date] => 2022-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3492
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 201
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17700858
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/700858 | Dual depth junction structures and process methods | Mar 21, 2022 | Issued |
Array
(
[id] => 17723399
[patent_doc_number] => 20220216121
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-07-07
[patent_title] => SEMICONDUCTOR PACKAGE STRUCTURE AND FABRICATION METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/700956
[patent_app_country] => US
[patent_app_date] => 2022-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10447
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17700956
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/700956 | Semiconductor package structure and fabrication method thereof | Mar 21, 2022 | Issued |
Array
(
[id] => 18653049
[patent_doc_number] => 20230298889
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-21
[patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/697418
[patent_app_country] => US
[patent_app_date] => 2022-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6631
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 498
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17697418
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/697418 | Method of manufacturing semiconductor device | Mar 16, 2022 | Issued |
Array
(
[id] => 17708975
[patent_doc_number] => 20220208983
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-06-30
[patent_title] => CONTACTS FOR HIGHLY SCALED TRANSISTORS
[patent_app_type] => utility
[patent_app_number] => 17/694043
[patent_app_country] => US
[patent_app_date] => 2022-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10250
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17694043
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/694043 | Contacts for highly scaled transistors | Mar 13, 2022 | Issued |
Array
(
[id] => 19540870
[patent_doc_number] => 12133437
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-10-29
[patent_title] => Display panel and display device
[patent_app_type] => utility
[patent_app_number] => 17/694068
[patent_app_country] => US
[patent_app_date] => 2022-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 8168
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17694068
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/694068 | Display panel and display device | Mar 13, 2022 | Issued |
Array
(
[id] => 19918592
[patent_doc_number] => 12293968
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-05-06
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/654443
[patent_app_country] => US
[patent_app_date] => 2022-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 16
[patent_no_of_words] => 0
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17654443
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/654443 | Semiconductor device | Mar 10, 2022 | Issued |
Array
(
[id] => 17692310
[patent_doc_number] => 20220199603
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-06-23
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/692954
[patent_app_country] => US
[patent_app_date] => 2022-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6006
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17692954
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/692954 | Semiconductor device and method of manufacturing the same | Mar 10, 2022 | Issued |
Array
(
[id] => 19314575
[patent_doc_number] => 12040402
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-07-16
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/690178
[patent_app_country] => US
[patent_app_date] => 2022-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 12004
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 261
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17690178
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/690178 | Semiconductor device | Mar 8, 2022 | Issued |