Search

James J. Carroll

Examiner (ID: 7514)

Most Active Art Unit
2508
Art Unit(s)
2811, 2503, 2508
Total Applications
1078
Issued Applications
657
Pending Applications
26
Abandoned Applications
395

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3420130 [patent_doc_number] => 05393999 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-02-28 [patent_title] => 'SiC power MOSFET device structure' [patent_app_type] => 1 [patent_app_number] => 8/257500 [patent_app_country] => US [patent_app_date] => 1994-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 1924 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/393/05393999.pdf [firstpage_image] =>[orig_patent_app_number] => 257500 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/257500
SiC power MOSFET device structure Jun 8, 1994 Issued
Array ( [id] => 3484626 [patent_doc_number] => 05457339 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-10 [patent_title] => 'Semiconductor device for element isolation and manufacturing method thereof' [patent_app_type] => 1 [patent_app_number] => 8/252629 [patent_app_country] => US [patent_app_date] => 1994-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 100 [patent_no_of_words] => 9521 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/457/05457339.pdf [firstpage_image] =>[orig_patent_app_number] => 252629 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/252629
Semiconductor device for element isolation and manufacturing method thereof Jun 1, 1994 Issued
Array ( [id] => 3433007 [patent_doc_number] => 05463244 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-31 [patent_title] => 'Antifuse programmable element using ferroelectric material' [patent_app_type] => 1 [patent_app_number] => 8/249870 [patent_app_country] => US [patent_app_date] => 1994-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 5181 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/463/05463244.pdf [firstpage_image] =>[orig_patent_app_number] => 249870 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/249870
Antifuse programmable element using ferroelectric material May 25, 1994 Issued
Array ( [id] => 3416565 [patent_doc_number] => 05444290 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-22 [patent_title] => 'Method and apparatus for programming antifuse elements using combined AC and DC electric fields' [patent_app_type] => 1 [patent_app_number] => 8/249524 [patent_app_country] => US [patent_app_date] => 1994-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3146 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/444/05444290.pdf [firstpage_image] =>[orig_patent_app_number] => 249524 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/249524
Method and apparatus for programming antifuse elements using combined AC and DC electric fields May 25, 1994 Issued
Array ( [id] => 3416133 [patent_doc_number] => 05412245 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-02 [patent_title] => 'Self-aligned vertical antifuse' [patent_app_type] => 1 [patent_app_number] => 8/247617 [patent_app_country] => US [patent_app_date] => 1994-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1463 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/412/05412245.pdf [firstpage_image] =>[orig_patent_app_number] => 247617 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/247617
Self-aligned vertical antifuse May 22, 1994 Issued
Array ( [id] => 3585561 [patent_doc_number] => 05498886 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-03-12 [patent_title] => 'Circuit module redundancy architecture' [patent_app_type] => 1 [patent_app_number] => 8/246396 [patent_app_country] => US [patent_app_date] => 1994-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 30 [patent_no_of_words] => 8492 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/498/05498886.pdf [firstpage_image] =>[orig_patent_app_number] => 246396 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/246396
Circuit module redundancy architecture May 19, 1994 Issued
Array ( [id] => 3544113 [patent_doc_number] => 05481137 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-02 [patent_title] => 'Semiconductor device with improved immunity to contact and conductor defects' [patent_app_type] => 1 [patent_app_number] => 8/246375 [patent_app_country] => US [patent_app_date] => 1994-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 4967 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/481/05481137.pdf [firstpage_image] =>[orig_patent_app_number] => 246375 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/246375
Semiconductor device with improved immunity to contact and conductor defects May 17, 1994 Issued
08/242198 SEMICONDUCTOR COMPONENT HAVING A PASSIVATION LAYER AND METHOD FOR MANUFACTURING SAME May 12, 1994 Abandoned
08/241461 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING A PROGRAMMABLE ADJUSTING ELEMENT IN THE FORM OF A FUSE MOUNTED ON A MARGIN OF THE DEVICE AND A METHOD OF MANUFATURING THE SAME May 10, 1994 Abandoned
08/238552 SURFACE MOUNT AND FLIP CHIP TECHNOLOGY FOR TOTAL INTERGRATED CIRCUIT ISOLATION May 4, 1994 Abandoned
08/233483 SUBLITHOGRAPHIC ANTIFUSE Apr 25, 1994 Abandoned
Array ( [id] => 3590514 [patent_doc_number] => 05552627 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-03 [patent_title] => 'Electrically programmable antifuse incorporating dielectric and amorphous silicon interlayers' [patent_app_type] => 1 [patent_app_number] => 8/231634 [patent_app_country] => US [patent_app_date] => 1994-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 7231 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/552/05552627.pdf [firstpage_image] =>[orig_patent_app_number] => 231634 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/231634
Electrically programmable antifuse incorporating dielectric and amorphous silicon interlayers Apr 21, 1994 Issued
Array ( [id] => 3561715 [patent_doc_number] => 05502328 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-03-26 [patent_title] => 'Bipolar ESD protection for integrated circuits' [patent_app_type] => 1 [patent_app_number] => 8/228834 [patent_app_country] => US [patent_app_date] => 1994-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2747 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/502/05502328.pdf [firstpage_image] =>[orig_patent_app_number] => 228834 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/228834
Bipolar ESD protection for integrated circuits Apr 17, 1994 Issued
Array ( [id] => 3668578 [patent_doc_number] => 05598019 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-28 [patent_title] => 'Semiconductor device having trench isolation structure and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 8/223952 [patent_app_country] => US [patent_app_date] => 1994-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 63 [patent_no_of_words] => 10833 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/598/05598019.pdf [firstpage_image] =>[orig_patent_app_number] => 223952 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/223952
Semiconductor device having trench isolation structure and method of manufacturing the same Apr 5, 1994 Issued
Array ( [id] => 3118063 [patent_doc_number] => 05396101 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-03-07 [patent_title] => 'Inductance element' [patent_app_type] => 1 [patent_app_number] => 8/223811 [patent_app_country] => US [patent_app_date] => 1994-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1748 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/396/05396101.pdf [firstpage_image] =>[orig_patent_app_number] => 223811 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/223811
Inductance element Apr 5, 1994 Issued
08/216940 SEMICONDUCTOR APPARATUS AND METHOD OF MANUFACTURING THE SAME Mar 23, 1994 Abandoned
Array ( [id] => 3006783 [patent_doc_number] => 05371402 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-06 [patent_title] => 'Low capacitance, low resistance sidewall antifuse structure and process' [patent_app_type] => 1 [patent_app_number] => 8/215881 [patent_app_country] => US [patent_app_date] => 1994-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 13 [patent_no_of_words] => 2275 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/371/05371402.pdf [firstpage_image] =>[orig_patent_app_number] => 215881 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/215881
Low capacitance, low resistance sidewall antifuse structure and process Mar 21, 1994 Issued
Array ( [id] => 3590486 [patent_doc_number] => 05552625 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-03 [patent_title] => 'Semiconductor device having a semi-insulating layer' [patent_app_type] => 1 [patent_app_number] => 8/208138 [patent_app_country] => US [patent_app_date] => 1994-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 5 [patent_no_of_words] => 7487 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/552/05552625.pdf [firstpage_image] =>[orig_patent_app_number] => 208138 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/208138
Semiconductor device having a semi-insulating layer Mar 8, 1994 Issued
Array ( [id] => 3117953 [patent_doc_number] => 05396095 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-03-07 [patent_title] => 'Method of manufacturing a semiconductor device comprising a capacitor with a ferroelectric dielectric, and semiconductor device comprising such a capacitor' [patent_app_type] => 1 [patent_app_number] => 8/206916 [patent_app_country] => US [patent_app_date] => 1994-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 4003 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/396/05396095.pdf [firstpage_image] =>[orig_patent_app_number] => 206916 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/206916
Method of manufacturing a semiconductor device comprising a capacitor with a ferroelectric dielectric, and semiconductor device comprising such a capacitor Mar 3, 1994 Issued
Array ( [id] => 3530760 [patent_doc_number] => 05541445 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-30 [patent_title] => 'High performance passivation for semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 8/196078 [patent_app_country] => US [patent_app_date] => 1994-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 26 [patent_no_of_words] => 5226 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/541/05541445.pdf [firstpage_image] =>[orig_patent_app_number] => 196078 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/196078
High performance passivation for semiconductor devices Feb 24, 1994 Issued
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