Search

James J. Groody

Examiner (ID: 16158)

Most Active Art Unit
2604
Art Unit(s)
2604, 2602, 2616, 3105, 2102, 2621
Total Applications
388
Issued Applications
361
Pending Applications
6
Abandoned Applications
21

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18205200 [patent_doc_number] => 11587602 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-21 [patent_title] => Timing signal delay compensation in a memory device [patent_app_type] => utility [patent_app_number] => 17/526846 [patent_app_country] => US [patent_app_date] => 2021-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 15791 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17526846 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/526846
Timing signal delay compensation in a memory device Nov 14, 2021 Issued
Array ( [id] => 18593140 [patent_doc_number] => 11742049 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => Hardware accelerator device, corresponding system and method of operation [patent_app_type] => utility [patent_app_number] => 17/453811 [patent_app_country] => US [patent_app_date] => 2021-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 12724 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17453811 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/453811
Hardware accelerator device, corresponding system and method of operation Nov 4, 2021 Issued
Array ( [id] => 18721294 [patent_doc_number] => 11798646 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-24 [patent_title] => Systems and methods for monitoring and managing memory devices [patent_app_type] => utility [patent_app_number] => 17/512392 [patent_app_country] => US [patent_app_date] => 2021-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 11518 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17512392 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/512392
Systems and methods for monitoring and managing memory devices Oct 26, 2021 Issued
Array ( [id] => 18494079 [patent_doc_number] => 11699500 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-11 [patent_title] => Storage device and operating method thereof [patent_app_type] => utility [patent_app_number] => 17/502590 [patent_app_country] => US [patent_app_date] => 2021-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 10986 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17502590 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/502590
Storage device and operating method thereof Oct 14, 2021 Issued
Array ( [id] => 18918988 [patent_doc_number] => 11881276 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-23 [patent_title] => Error correcting code decoder [patent_app_type] => utility [patent_app_number] => 17/500803 [patent_app_country] => US [patent_app_date] => 2021-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6906 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17500803 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/500803
Error correcting code decoder Oct 12, 2021 Issued
Array ( [id] => 18639295 [patent_doc_number] => 11763911 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => On-chip-copy for integrated memory assembly [patent_app_type] => utility [patent_app_number] => 17/494129 [patent_app_country] => US [patent_app_date] => 2021-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 42 [patent_no_of_words] => 26512 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17494129 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/494129
On-chip-copy for integrated memory assembly Oct 4, 2021 Issued
Array ( [id] => 19277092 [patent_doc_number] => 12027223 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-02 [patent_title] => Method, device, apparatus and storage medium for repairing failed bits [patent_app_type] => utility [patent_app_number] => 17/449590 [patent_app_country] => US [patent_app_date] => 2021-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 7496 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17449590 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/449590
Method, device, apparatus and storage medium for repairing failed bits Sep 29, 2021 Issued
Array ( [id] => 17949016 [patent_doc_number] => 20220336035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => MEMORY APPARATUS AND SEMICONDUCTOR SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/473299 [patent_app_country] => US [patent_app_date] => 2021-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5647 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17473299 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/473299
Memory apparatus and semiconductor system including the same Sep 12, 2021 Issued
Array ( [id] => 17795336 [patent_doc_number] => 20220254428 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-11 [patent_title] => CONDUCTING BUILT-IN SELF-TEST OF MEMORY MACRO [patent_app_type] => utility [patent_app_number] => 17/470838 [patent_app_country] => US [patent_app_date] => 2021-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12066 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17470838 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/470838
Conducting built-in self-test of memory macro Sep 8, 2021 Issued
Array ( [id] => 18431451 [patent_doc_number] => 11676678 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-13 [patent_title] => Defect detecting method and device for word line driving circuit [patent_app_type] => utility [patent_app_number] => 17/470001 [patent_app_country] => US [patent_app_date] => 2021-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5328 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17470001 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/470001
Defect detecting method and device for word line driving circuit Sep 8, 2021 Issued
Array ( [id] => 18839988 [patent_doc_number] => 11848067 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-19 [patent_title] => Apparatus including internal test mechanism and associated methods [patent_app_type] => utility [patent_app_number] => 17/467800 [patent_app_country] => US [patent_app_date] => 2021-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6253 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17467800 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/467800
Apparatus including internal test mechanism and associated methods Sep 6, 2021 Issued
Array ( [id] => 17870468 [patent_doc_number] => 20220293205 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => BUILT-IN-SELF-TEST LOGIC, MEMORY DEVICE WITH SAME, AND MEMORY MODULE TESTING METHOD [patent_app_type] => utility [patent_app_number] => 17/467861 [patent_app_country] => US [patent_app_date] => 2021-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13900 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17467861 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/467861
Built-in-self-test logic, memory device with same, and memory module testing method Sep 6, 2021 Issued
Array ( [id] => 18645491 [patent_doc_number] => 11769569 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-26 [patent_title] => Memory device with failed main bank repair using redundant bank [patent_app_type] => utility [patent_app_number] => 17/467192 [patent_app_country] => US [patent_app_date] => 2021-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 30 [patent_no_of_words] => 18505 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17467192 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/467192
Memory device with failed main bank repair using redundant bank Sep 3, 2021 Issued
Array ( [id] => 17477115 [patent_doc_number] => 20220084619 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => MEMORY DEVICE, TESTING METHOD AND USING METHOD THEREOF, AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/446143 [patent_app_country] => US [patent_app_date] => 2021-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13452 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17446143 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/446143
Memory device, testing method and using method thereof, and memory system Aug 25, 2021 Issued
Array ( [id] => 18768544 [patent_doc_number] => 11818968 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-14 [patent_title] => Conductive interconnects suitable for utilization in integrated assemblies, and methods of forming conductive interconnects [patent_app_type] => utility [patent_app_number] => 17/410591 [patent_app_country] => US [patent_app_date] => 2021-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 5399 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17410591 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/410591
Conductive interconnects suitable for utilization in integrated assemblies, and methods of forming conductive interconnects Aug 23, 2021 Issued
Array ( [id] => 18263330 [patent_doc_number] => 11611039 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-21 [patent_title] => Resistive random access memory device [patent_app_type] => utility [patent_app_number] => 17/405907 [patent_app_country] => US [patent_app_date] => 2021-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7801 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17405907 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/405907
Resistive random access memory device Aug 17, 2021 Issued
Array ( [id] => 18184426 [patent_doc_number] => 20230045156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => Method and Storage System with a Non-Volatile Bad Block Read Cache Using Partial Blocks [patent_app_type] => utility [patent_app_number] => 17/397245 [patent_app_country] => US [patent_app_date] => 2021-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6269 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17397245 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/397245
Method and storage system with a non-volatile bad block read cache using partial blocks Aug 8, 2021 Issued
Array ( [id] => 17508837 [patent_doc_number] => 20220101940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => DETECT WHETHER DIE OR CHANNEL IS DEFECTIVE TO CONFIRM TEMPERATURE DATA [patent_app_type] => utility [patent_app_number] => 17/397213 [patent_app_country] => US [patent_app_date] => 2021-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6555 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17397213 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/397213
Detect whether die or channel is defective to confirm temperature data Aug 8, 2021 Issued
Array ( [id] => 17246822 [patent_doc_number] => 20210366567 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-25 [patent_title] => READ/WRITE METHOD AND MEMORY [patent_app_type] => utility [patent_app_number] => 17/396692 [patent_app_country] => US [patent_app_date] => 2021-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7492 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17396692 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/396692
Systems and methods for read/write of memory devices and error correction Aug 6, 2021 Issued
Array ( [id] => 18181240 [patent_doc_number] => 20230041969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => Memory cell based on self-assembled monolayer polaron [patent_app_type] => utility [patent_app_number] => 17/394515 [patent_app_country] => US [patent_app_date] => 2021-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8258 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -34 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17394515 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/394515
Memory cell based on self-assembled monolayer polaron Aug 4, 2021 Issued
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