Search

James Largen

Examiner (ID: 6238)

Most Active Art Unit
2901
Art Unit(s)
2901, 2900, 2902, 2903, 2904
Total Applications
2691
Issued Applications
2645
Pending Applications
1
Abandoned Applications
45

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13376025 [patent_doc_number] => 20180239554 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-23 [patent_title] => LINKING SERVER AND INFORMATION PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 15/903763 [patent_app_country] => US [patent_app_date] => 2018-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3921 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15903763 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/903763
Linking server and information processing method Feb 22, 2018 Issued
Array ( [id] => 14781981 [patent_doc_number] => 20190265888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-29 [patent_title] => Storage System and Method for Performing High-Speed Read and Write Operations [patent_app_type] => utility [patent_app_number] => 15/903930 [patent_app_country] => US [patent_app_date] => 2018-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8167 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15903930 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/903930
Storage system and method for performing high-speed read and write operations Feb 22, 2018 Issued
Array ( [id] => 17499311 [patent_doc_number] => 11288017 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-29 [patent_title] => Devices, systems, and methods for storing data using distributed control [patent_app_type] => utility [patent_app_number] => 15/904080 [patent_app_country] => US [patent_app_date] => 2018-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9505 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 756 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15904080 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/904080
Devices, systems, and methods for storing data using distributed control Feb 22, 2018 Issued
Array ( [id] => 14282331 [patent_doc_number] => 20190138450 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => METHOD TO AVOID CACHE ACCESS CONFLICT BETWEEN LOAD AND FILL [patent_app_type] => utility [patent_app_number] => 15/900789 [patent_app_country] => US [patent_app_date] => 2018-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6546 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15900789 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/900789
Method to avoid cache access conflict between load and fill Feb 19, 2018 Issued
Array ( [id] => 12848440 [patent_doc_number] => 20180174653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-21 [patent_title] => METHOD AND DEVICE TO REDUCE LEAKAGE AND DYNAMIC ENERGY CONSUMPTION IN HIGH-SPEED MEMORIES [patent_app_type] => utility [patent_app_number] => 15/897503 [patent_app_country] => US [patent_app_date] => 2018-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12755 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15897503 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/897503
Method and device to reduce leakage and dynamic energy consumption in high-speed memories Feb 14, 2018 Issued
Array ( [id] => 12819526 [patent_doc_number] => 20180165014 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-14 [patent_title] => ARRAY CONTROLLER, SOLID STATE DISK, AND METHOD FOR CONTROLLING SOLID STATE DISK TO WRITE DATA [patent_app_type] => utility [patent_app_number] => 15/889209 [patent_app_country] => US [patent_app_date] => 2018-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10275 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15889209 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/889209
Array controller, solid state disk, and method for controlling solid state disk to write data Feb 5, 2018 Issued
Array ( [id] => 13875971 [patent_doc_number] => 20190034326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => DYNAMIC CONFIGURATION OF CACHES IN A MULTI-CONTEXT SUPPORTED GRAPHICS PROCESSOR [patent_app_type] => utility [patent_app_number] => 15/858704 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17224 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15858704 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/858704
Dynamic configuration of caches in a multi-context supported graphics processor Dec 28, 2017 Issued
Array ( [id] => 17824686 [patent_doc_number] => 11429634 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-30 [patent_title] => Storage interface for synchronizing content [patent_app_type] => utility [patent_app_number] => 15/858430 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 20886 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15858430 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/858430
Storage interface for synchronizing content Dec 28, 2017 Issued
Array ( [id] => 15136981 [patent_doc_number] => 10481958 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-19 [patent_title] => Speculative execution tag for asynchronous DRAM refresh [patent_app_type] => utility [patent_app_number] => 15/858732 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 6032 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15858732 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/858732
Speculative execution tag for asynchronous DRAM refresh Dec 28, 2017 Issued
Array ( [id] => 16478311 [patent_doc_number] => 10853259 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-01 [patent_title] => Exitless extended page table switching for nested hypervisors [patent_app_type] => utility [patent_app_number] => 15/858619 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5476 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15858619 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/858619
Exitless extended page table switching for nested hypervisors Dec 28, 2017 Issued
Array ( [id] => 14539279 [patent_doc_number] => 20190205261 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => SYSTEMS, METHODS, AND APPARATUSES FOR PATCHING PAGES [patent_app_type] => utility [patent_app_number] => 15/858262 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10725 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15858262 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/858262
SYSTEMS, METHODS, AND APPARATUSES FOR PATCHING PAGES Dec 28, 2017 Abandoned
Array ( [id] => 14538879 [patent_doc_number] => 20190205061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => PROCESSOR, METHOD, AND SYSTEM FOR REDUCING LATENCY IN ACCESSING REMOTE REGISTERS [patent_app_type] => utility [patent_app_number] => 15/858878 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10143 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15858878 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/858878
PROCESSOR, METHOD, AND SYSTEM FOR REDUCING LATENCY IN ACCESSING REMOTE REGISTERS Dec 28, 2017 Abandoned
Array ( [id] => 15012803 [patent_doc_number] => 10452547 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-22 [patent_title] => Fault-tolerant cache coherence over a lossy network [patent_app_type] => utility [patent_app_number] => 15/858787 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 56 [patent_no_of_words] => 16820 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15858787 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/858787
Fault-tolerant cache coherence over a lossy network Dec 28, 2017 Issued
Array ( [id] => 14538843 [patent_doc_number] => 20190205043 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => MANAGING PARTIAL SUPERBLOCKS IN A NAND DEVICE [patent_app_type] => utility [patent_app_number] => 15/858383 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11585 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15858383 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/858383
Managing partial superblocks in a NAND device Dec 28, 2017 Issued
Array ( [id] => 13905843 [patent_doc_number] => 20190042126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => TECHNOLOGIES FOR STORAGE DISCOVERY AND REALLOCATION [patent_app_type] => utility [patent_app_number] => 15/858569 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16729 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15858569 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/858569
TECHNOLOGIES FOR STORAGE DISCOVERY AND REALLOCATION Dec 28, 2017 Abandoned
Array ( [id] => 12688558 [patent_doc_number] => 20180121352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-03 [patent_title] => EFFICIENT AND SECURE DIRECT STORAGE DEVICE SHARING IN VIRTUALIZED ENVIRONMENTS [patent_app_type] => utility [patent_app_number] => 15/855613 [patent_app_country] => US [patent_app_date] => 2017-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3850 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15855613 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/855613
Efficient and secure direct storage device sharing in virtualized environments Dec 26, 2017 Issued
Array ( [id] => 13752569 [patent_doc_number] => 10169231 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-01 [patent_title] => Efficient and secure direct storage device sharing in virtualized environments [patent_app_type] => utility [patent_app_number] => 15/832174 [patent_app_country] => US [patent_app_date] => 2017-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3872 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15832174 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/832174
Efficient and secure direct storage device sharing in virtualized environments Dec 4, 2017 Issued
Array ( [id] => 14235345 [patent_doc_number] => 20190129845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-02 [patent_title] => MANAGING OBJECTS STORED IN MEMORY [patent_app_type] => utility [patent_app_number] => 15/802082 [patent_app_country] => US [patent_app_date] => 2017-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7312 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15802082 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/802082
Managing objects stored in memory Nov 1, 2017 Issued
Array ( [id] => 12208303 [patent_doc_number] => 20180053529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-22 [patent_title] => 'HIGH RESOLUTION TAPE DIRECTORY (HRTD) STORED AT END OF DATA IN AN INDEX PARTITION' [patent_app_type] => utility [patent_app_number] => 15/801104 [patent_app_country] => US [patent_app_date] => 2017-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9404 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15801104 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/801104
High resolution tape directory (HRTD) stored at end of data in an index partition Oct 31, 2017 Issued
Array ( [id] => 14188883 [patent_doc_number] => 20190114147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => MEMORY SYSTEMS INCLUDING SUPPORT FOR TRANSPOSITION OPERATIONS AND RELATED METHODS AND CIRCUITS [patent_app_type] => utility [patent_app_number] => 15/783548 [patent_app_country] => US [patent_app_date] => 2017-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5229 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15783548 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/783548
Memory systems including support for transposition operations and related methods and circuits Oct 12, 2017 Issued
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