James Largen

Array ( [id] => 5926317 [patent_doc_number] => 20110037491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-17 [patent_title] => 'Circuit Board Having Bypass Pad' [patent_app_type] => utility [patent_app_number] => 12/910645 [patent_app_country] => US [patent_app_date] => 2010-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6616 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20110037491.pdf [firstpage_image] =>[orig_patent_app_number] => 12910645 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8871322 [patent_doc_number] => 08466701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-18 [patent_title] => 'Power supply stabilizing circuit, electronic device and test apparatus' [patent_app_type] => utility [patent_app_number] => 12/903137 [patent_app_country] => US [patent_app_date] => 2010-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6491 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12903137 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9087130 [patent_doc_number] => 08558560 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-15 [patent_title] => 'Test apparatus, additional circuit and test board for judgment based on peak current' [patent_app_type] => utility [patent_app_number] => 12/876057 [patent_app_country] => US [patent_app_date] => 2010-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8863 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12876057 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9087128 [patent_doc_number] => 08558559 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-15 [patent_title] => 'Test apparatus, additional circuit and test board for calculating load current of a device under test' [patent_app_type] => utility [patent_app_number] => 12/876052 [patent_app_country] => US [patent_app_date] => 2010-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6069 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12876052 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9524978 [patent_doc_number] => 08749256 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-10 [patent_title] => 'Measurement system' [patent_app_type] => utility [patent_app_number] => 12/874247 [patent_app_country] => US [patent_app_date] => 2010-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4485 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12874247 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8797745 [patent_doc_number] => 08436620 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-07 [patent_title] => 'Voltage monitoring using bitstream signal processing' [patent_app_type] => utility [patent_app_number] => 12/874911 [patent_app_country] => US [patent_app_date] => 2010-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4551 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12874911 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11180898 [patent_doc_number] => 09412898 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-09 [patent_title] => 'Apparatus and method of testing a substrate using a supporting nest and testing probes' [patent_app_type] => utility [patent_app_number] => 13/394127 [patent_app_country] => US [patent_app_date] => 2010-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 6271 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13394127 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8773211 [patent_doc_number] => 08427174 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-23 [patent_title] => 'Measurement process for determination of the optimum contact pressure among components of a solid oxide fuel cell stack in the packaging process and its measurement apparatus' [patent_app_type] => utility [patent_app_number] => 12/874307 [patent_app_country] => US [patent_app_date] => 2010-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3889 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12874307 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9497473 [patent_doc_number] => 08736295 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-27 [patent_title] => 'Semiconductor testing circuit, semiconductor testing jig, semiconductor testing apparatus, and semiconductor testing method' [patent_app_type] => utility [patent_app_number] => 12/873738 [patent_app_country] => US [patent_app_date] => 2010-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 6572 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12873738 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6330896 [patent_doc_number] => 20100327908 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'METHOD AND APPARATUS FOR DIE TESTING ON WAFER' [patent_app_type] => utility [patent_app_number] => 12/872495 [patent_app_country] => US [patent_app_date] => 2010-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 9594 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0327/20100327908.pdf [firstpage_image] =>[orig_patent_app_number] => 12872495 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5941339 [patent_doc_number] => 20110101959 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-05 [patent_title] => 'CURRENT-CONTROLLED SEMICONDUCTOR DEVICE AND CONTROL UNIT USING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/868236 [patent_app_country] => US [patent_app_date] => 2010-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8163 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0101/20110101959.pdf [firstpage_image] =>[orig_patent_app_number] => 12868236 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6004705 [patent_doc_number] => 20110057664 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-10 [patent_title] => 'DEVICE-DEPENDENT REPLACEABLE UNIT AND MANUFACTURING METHOD' [patent_app_type] => utility [patent_app_number] => 12/851276 [patent_app_country] => US [patent_app_date] => 2010-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7288 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20110057664.pdf [firstpage_image] =>[orig_patent_app_number] => 12851276 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6193548 [patent_doc_number] => 20110025302 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-03 [patent_title] => 'System and Method for Performing Power Spectral Density and Power Level Measurements' [patent_app_type] => utility [patent_app_number] => 12/848332 [patent_app_country] => US [patent_app_date] => 2010-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3160 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20110025302.pdf [firstpage_image] =>[orig_patent_app_number] => 12848332 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5949488 [patent_doc_number] => 20110031980 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-10 [patent_title] => 'SYSTEM FOR MONITORING A TRANSFORMER' [patent_app_type] => utility [patent_app_number] => 12/847555 [patent_app_country] => US [patent_app_date] => 2010-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3860 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20110031980.pdf [firstpage_image] =>[orig_patent_app_number] => 12847555 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8578519 [patent_doc_number] => 08344735 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-01 [patent_title] => 'Solid electrolytic capacitor' [patent_app_type] => utility [patent_app_number] => 12/847188 [patent_app_country] => US [patent_app_date] => 2010-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 6273 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12847188 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8352753 [patent_doc_number] => 08248093 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-21 [patent_title] => 'Circuit board having bypass pad' [patent_app_type] => utility [patent_app_number] => 12/837649 [patent_app_country] => US [patent_app_date] => 2010-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 27 [patent_no_of_words] => 6654 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12837649 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6131543 [patent_doc_number] => 20110006752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-13 [patent_title] => 'METHOD AND APPARATUS FOR EVALUATING ELECTROMAGNETIC HAZARD PROTECTION DEVICES' [patent_app_type] => utility [patent_app_number] => 12/830610 [patent_app_country] => US [patent_app_date] => 2010-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5294 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20110006752.pdf [firstpage_image] =>[orig_patent_app_number] => 12830610 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6091534 [patent_doc_number] => 20110001509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-06 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD FOR TESTING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/827974 [patent_app_country] => US [patent_app_date] => 2010-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3138 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20110001509.pdf [firstpage_image] =>[orig_patent_app_number] => 12827974 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8083371 [patent_doc_number] => 08149009 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-03 [patent_title] => 'Apparatus and method for terminating probe apparatus of semiconductor wafer' [patent_app_type] => utility [patent_app_number] => 12/820640 [patent_app_country] => US [patent_app_date] => 2010-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1916 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/149/08149009.pdf [firstpage_image] =>[orig_patent_app_number] => 12820640 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6265314 [patent_doc_number] => 20100253377 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-07 [patent_title] => 'ACTIVE WAFER PROBE' [patent_app_type] => utility [patent_app_number] => 12/816569 [patent_app_country] => US [patent_app_date] => 2010-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6376 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20100253377.pdf [firstpage_image] =>[orig_patent_app_number] => 12816569 [rel_patent_id] =>[rel_patent_doc_number] =>)