Search

James Largen

Examiner (ID: 14395)

Most Active Art Unit
2901
Art Unit(s)
2902, 2903, 2901, 2904, 2900
Total Applications
2691
Issued Applications
2645
Pending Applications
1
Abandoned Applications
45

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 236672 [patent_doc_number] => 07595654 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-09-29 [patent_title] => 'Methods and apparatus for inline variability measurement of integrated circuit components' [patent_app_type] => utility [patent_app_number] => 12/041388 [patent_app_country] => US [patent_app_date] => 2008-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 6000 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/595/07595654.pdf [firstpage_image] =>[orig_patent_app_number] => 12041388 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/041388
Methods and apparatus for inline variability measurement of integrated circuit components Mar 2, 2008 Issued
Array ( [id] => 5307958 [patent_doc_number] => 20090015239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-15 [patent_title] => 'Transmission Line Sensor' [patent_app_type] => utility [patent_app_number] => 12/041228 [patent_app_country] => US [patent_app_date] => 2008-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8869 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20090015239.pdf [firstpage_image] =>[orig_patent_app_number] => 12041228 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/041228
Transmission Line Sensor Mar 2, 2008 Abandoned
Array ( [id] => 5537230 [patent_doc_number] => 20090219035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-03 [patent_title] => 'METHOD AND SYSTEM FOR IMPROVED TESTING OF TRANSISTOR ARRAYS' [patent_app_type] => utility [patent_app_number] => 12/040807 [patent_app_country] => US [patent_app_date] => 2008-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4827 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0219/20090219035.pdf [firstpage_image] =>[orig_patent_app_number] => 12040807 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/040807
System for testing transistor arrays in production Feb 28, 2008 Issued
Array ( [id] => 282318 [patent_doc_number] => 07554319 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-06-30 [patent_title] => 'Circuits and methods for voltage sensing' [patent_app_type] => utility [patent_app_number] => 12/072827 [patent_app_country] => US [patent_app_date] => 2008-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3555 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/554/07554319.pdf [firstpage_image] =>[orig_patent_app_number] => 12072827 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/072827
Circuits and methods for voltage sensing Feb 27, 2008 Issued
Array ( [id] => 4850163 [patent_doc_number] => 20080315905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'Electrical Connecting Apparatus' [patent_app_type] => utility [patent_app_number] => 12/039027 [patent_app_country] => US [patent_app_date] => 2008-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4495 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0315/20080315905.pdf [firstpage_image] =>[orig_patent_app_number] => 12039027 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/039027
Probe board mounting apparatus Feb 27, 2008 Issued
Array ( [id] => 4724515 [patent_doc_number] => 20080204056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-28 [patent_title] => 'DEVICE AND METHOD FOR PERFORMING A TEST OF SEMICONDUCTOR DEVICES WITH AN OPTICAL INTERFACE' [patent_app_type] => utility [patent_app_number] => 12/039133 [patent_app_country] => US [patent_app_date] => 2008-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4136 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0204/20080204056.pdf [firstpage_image] =>[orig_patent_app_number] => 12039133 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/039133
DEVICE AND METHOD FOR PERFORMING A TEST OF SEMICONDUCTOR DEVICES WITH AN OPTICAL INTERFACE Feb 27, 2008 Abandoned
Array ( [id] => 360220 [patent_doc_number] => 07486099 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-02-03 [patent_title] => 'System and method for testing power transistors' [patent_app_type] => utility [patent_app_number] => 12/073030 [patent_app_country] => US [patent_app_date] => 2008-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4806 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/486/07486099.pdf [firstpage_image] =>[orig_patent_app_number] => 12073030 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/073030
System and method for testing power transistors Feb 27, 2008 Issued
Array ( [id] => 4587958 [patent_doc_number] => 07852102 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-14 [patent_title] => 'Method and apparatus for inspecting semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/294127 [patent_app_country] => US [patent_app_date] => 2008-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6468 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/852/07852102.pdf [firstpage_image] =>[orig_patent_app_number] => 12294127 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/294127
Method and apparatus for inspecting semiconductor device Feb 25, 2008 Issued
Array ( [id] => 7713877 [patent_doc_number] => 08093909 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-10 [patent_title] => 'Method and device for measuring phase noise' [patent_app_type] => utility [patent_app_number] => 12/301966 [patent_app_country] => US [patent_app_date] => 2008-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3711 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/093/08093909.pdf [firstpage_image] =>[orig_patent_app_number] => 12301966 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/301966
Method and device for measuring phase noise Feb 6, 2008 Issued
Array ( [id] => 185939 [patent_doc_number] => 07649372 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-19 [patent_title] => 'Die design with integrated assembly aid' [patent_app_type] => utility [patent_app_number] => 12/027711 [patent_app_country] => US [patent_app_date] => 2008-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 5017 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/649/07649372.pdf [firstpage_image] =>[orig_patent_app_number] => 12027711 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/027711
Die design with integrated assembly aid Feb 6, 2008 Issued
Array ( [id] => 4953022 [patent_doc_number] => 20080186046 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-07 [patent_title] => 'Test socket for testing semiconductor chip, test apparatus including the test socket and method for testing semiconductor chip' [patent_app_type] => utility [patent_app_number] => 12/012537 [patent_app_country] => US [patent_app_date] => 2008-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4874 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20080186046.pdf [firstpage_image] =>[orig_patent_app_number] => 12012537 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/012537
Test socket for testing semiconductor chip, test apparatus including the test socket and method for testing semiconductor chip Feb 3, 2008 Abandoned
Array ( [id] => 4871135 [patent_doc_number] => 20080197869 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-21 [patent_title] => 'ELECTRICAL CONNECTING APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/025631 [patent_app_country] => US [patent_app_date] => 2008-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5586 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20080197869.pdf [firstpage_image] =>[orig_patent_app_number] => 12025631 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/025631
ELECTRICAL CONNECTING APPARATUS Feb 3, 2008 Abandoned
Array ( [id] => 331028 [patent_doc_number] => 07511527 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-03-31 [patent_title] => 'Methods and apparatus to test power transistors' [patent_app_type] => utility [patent_app_number] => 12/021931 [patent_app_country] => US [patent_app_date] => 2008-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4812 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/511/07511527.pdf [firstpage_image] =>[orig_patent_app_number] => 12021931 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/021931
Methods and apparatus to test power transistors Jan 28, 2008 Issued
Array ( [id] => 4763116 [patent_doc_number] => 20080174326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-24 [patent_title] => 'PROBE, PROBE ASSEMBLY AND PROBE CARD FOR ELECTRICAL TESTING' [patent_app_type] => utility [patent_app_number] => 12/018760 [patent_app_country] => US [patent_app_date] => 2008-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6282 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20080174326.pdf [firstpage_image] =>[orig_patent_app_number] => 12018760 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/018760
PROBE, PROBE ASSEMBLY AND PROBE CARD FOR ELECTRICAL TESTING Jan 22, 2008 Abandoned
Array ( [id] => 4763089 [patent_doc_number] => 20080174299 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-24 [patent_title] => 'TEST TRAY AND HANDLER USING THE TEST TRAY' [patent_app_type] => utility [patent_app_number] => 12/017730 [patent_app_country] => US [patent_app_date] => 2008-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4414 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20080174299.pdf [firstpage_image] =>[orig_patent_app_number] => 12017730 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/017730
Test tray and handler using the test tray Jan 21, 2008 Issued
Array ( [id] => 267564 [patent_doc_number] => 07567091 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-28 [patent_title] => 'Method for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer' [patent_app_type] => utility [patent_app_number] => 12/017262 [patent_app_country] => US [patent_app_date] => 2008-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3310 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/567/07567091.pdf [firstpage_image] =>[orig_patent_app_number] => 12017262 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/017262
Method for isolating a short-circuited integrated circuit (IC) from other ICs on a semiconductor wafer Jan 20, 2008 Issued
Array ( [id] => 4837669 [patent_doc_number] => 20080278190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-13 [patent_title] => 'Testing fuse configurations in semiconductor devices' [patent_app_type] => utility [patent_app_number] => 12/008318 [patent_app_country] => US [patent_app_date] => 2008-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 12267 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0278/20080278190.pdf [firstpage_image] =>[orig_patent_app_number] => 12008318 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/008318
Testing fuse configurations in semiconductor devices Jan 9, 2008 Issued
Array ( [id] => 584892 [patent_doc_number] => 07453257 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-11-18 [patent_title] => 'System and method for precision current source' [patent_app_type] => utility [patent_app_number] => 11/969736 [patent_app_country] => US [patent_app_date] => 2008-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3709 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/453/07453257.pdf [firstpage_image] =>[orig_patent_app_number] => 11969736 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/969736
System and method for precision current source Jan 3, 2008 Issued
Array ( [id] => 4925531 [patent_doc_number] => 20080164894 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-10 [patent_title] => 'System and method for testing semiconductor integrated circuit in parallel' [patent_app_type] => utility [patent_app_number] => 12/006560 [patent_app_country] => US [patent_app_date] => 2008-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3899 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20080164894.pdf [firstpage_image] =>[orig_patent_app_number] => 12006560 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/006560
System and method for testing semiconductor integrated circuit in parallel Jan 2, 2008 Abandoned
Array ( [id] => 4763107 [patent_doc_number] => 20080174317 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-24 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/005305 [patent_app_country] => US [patent_app_date] => 2007-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6656 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20080174317.pdf [firstpage_image] =>[orig_patent_app_number] => 12005305 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/005305
Semiconductor device for performing mount test in response to internal test mode signals Dec 26, 2007 Issued
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