Search

James Largen

Examiner (ID: 6238)

Most Active Art Unit
2901
Art Unit(s)
2901, 2900, 2902, 2903, 2904
Total Applications
2691
Issued Applications
2645
Pending Applications
1
Abandoned Applications
45

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19235693 [patent_doc_number] => 20240192888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => LOW-LATENCY PROCESSING FOR UNMAP COMMANDS [patent_app_type] => utility [patent_app_number] => 17/758332 [patent_app_country] => US [patent_app_date] => 2022-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15273 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17758332 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/758332
LOW-LATENCY PROCESSING FOR UNMAP COMMANDS Mar 16, 2022 Pending
Array ( [id] => 19235692 [patent_doc_number] => 20240192887 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => TECHNIQUES FOR EFFICIENTLY HANDLING MISALIGNED SEQUENTIAL READS [patent_app_type] => utility [patent_app_number] => 17/758331 [patent_app_country] => US [patent_app_date] => 2022-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15888 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17758331 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/758331
TECHNIQUES FOR EFFICIENTLY HANDLING MISALIGNED SEQUENTIAL READS Mar 16, 2022 Issued
Array ( [id] => 19235693 [patent_doc_number] => 20240192888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => LOW-LATENCY PROCESSING FOR UNMAP COMMANDS [patent_app_type] => utility [patent_app_number] => 17/758332 [patent_app_country] => US [patent_app_date] => 2022-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15273 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17758332 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/758332
LOW-LATENCY PROCESSING FOR UNMAP COMMANDS Mar 16, 2022 Pending
Array ( [id] => 20079656 [patent_doc_number] => 12353725 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Verification of a volatile memory using a unique identifier [patent_app_type] => utility [patent_app_number] => 17/694355 [patent_app_country] => US [patent_app_date] => 2022-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12784 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17694355 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/694355
Verification of a volatile memory using a unique identifier Mar 13, 2022 Issued
Array ( [id] => 18630202 [patent_doc_number] => 20230289094 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => TECHNIQUES FOR CONTROLLING COMMAND ORDER [patent_app_type] => utility [patent_app_number] => 17/654536 [patent_app_country] => US [patent_app_date] => 2022-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18750 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17654536 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/654536
Techniques for controlling command order Mar 10, 2022 Issued
Array ( [id] => 18750436 [patent_doc_number] => 11809748 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-07 [patent_title] => Control method of flash memory controller and associated flash memory controller and electronic device [patent_app_type] => utility [patent_app_number] => 17/692121 [patent_app_country] => US [patent_app_date] => 2022-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4499 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17692121 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/692121
Control method of flash memory controller and associated flash memory controller and electronic device Mar 9, 2022 Issued
Array ( [id] => 18630205 [patent_doc_number] => 20230289097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => METHOD AND APPARATUS FOR PERFORMING ACCESS MANAGEMENT OF MEMORY DEVICE WITH AID OF SERIAL NUMBER ASSIGNMENT TIMING CONTROL [patent_app_type] => utility [patent_app_number] => 17/691137 [patent_app_country] => US [patent_app_date] => 2022-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11278 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 319 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17691137 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/691137
Method and apparatus for performing access management of memory device with aid of serial number assignment timing control Mar 9, 2022 Issued
Array ( [id] => 17853693 [patent_doc_number] => 20220283735 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => ENABLING MEMORY ACCESS TRANSACTIONS FOR PERSISTENT MEMORY [patent_app_type] => utility [patent_app_number] => 17/677535 [patent_app_country] => US [patent_app_date] => 2022-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12363 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17677535 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/677535
Enabling memory access transactions for persistent memory Feb 21, 2022 Issued
Array ( [id] => 18584616 [patent_doc_number] => 20230266880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => TECHNIQUES TO IMPROVE LATENCY FOR GAMING APPLICATIONS [patent_app_type] => utility [patent_app_number] => 17/652050 [patent_app_country] => US [patent_app_date] => 2022-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14162 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17652050 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/652050
Techniques to improve latency for gaming applications Feb 21, 2022 Issued
Array ( [id] => 18531687 [patent_doc_number] => 20230236759 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-27 [patent_title] => SCANNING PAGES OF SHARED MEMORY [patent_app_type] => utility [patent_app_number] => 17/580700 [patent_app_country] => US [patent_app_date] => 2022-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4620 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17580700 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/580700
Scanning pages of shared memory Jan 20, 2022 Issued
Array ( [id] => 18513087 [patent_doc_number] => 20230229312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-20 [patent_title] => FLASH MEMORY SCHEME CAPABLE OF DECREASING WAITING TIME OF TRIM COMMAND [patent_app_type] => utility [patent_app_number] => 17/578380 [patent_app_country] => US [patent_app_date] => 2022-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6189 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 313 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17578380 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/578380
Flash memory scheme capable of decreasing waiting time of trim command Jan 17, 2022 Issued
Array ( [id] => 20079675 [patent_doc_number] => 12353744 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Cold storage partition management in proof of space blockchain systems [patent_app_type] => utility [patent_app_number] => 17/576634 [patent_app_country] => US [patent_app_date] => 2022-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4886 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17576634 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/576634
Cold storage partition management in proof of space blockchain systems Jan 13, 2022 Issued
Array ( [id] => 18454101 [patent_doc_number] => 20230195381 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => CORRECTIVE READ OF A MEMORY DEVICE WITH REDUCED LATENCY [patent_app_type] => utility [patent_app_number] => 17/645683 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13829 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17645683 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/645683
Corrective read of a memory device with reduced latency Dec 21, 2021 Issued
Array ( [id] => 18240261 [patent_doc_number] => 20230072572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => I/O COMMAND CONTROL DEVICE AND INFORMATION STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 17/548104 [patent_app_country] => US [patent_app_date] => 2021-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17465 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 319 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17548104 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/548104
I/O command control device and information storage device Dec 9, 2021 Issued
Array ( [id] => 17507284 [patent_doc_number] => 20220100387 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => STORAGE SYSTEM, COMPUTER SYSTEM, AND CONTROL METHOD FOR STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 17/547116 [patent_app_country] => US [patent_app_date] => 2021-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14689 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17547116 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/547116
STORAGE SYSTEM, COMPUTER SYSTEM, AND CONTROL METHOD FOR STORAGE SYSTEM Dec 8, 2021 Pending
Array ( [id] => 19610183 [patent_doc_number] => 12159058 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-03 [patent_title] => High-performance input buffer and memory device having the same [patent_app_type] => utility [patent_app_number] => 17/450747 [patent_app_country] => US [patent_app_date] => 2021-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 7215 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17450747 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/450747
High-performance input buffer and memory device having the same Oct 12, 2021 Issued
Array ( [id] => 18855972 [patent_doc_number] => 11853555 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => NVMe dual port enterprise SSD optimization [patent_app_type] => utility [patent_app_number] => 17/450525 [patent_app_country] => US [patent_app_date] => 2021-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5341 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17450525 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/450525
NVMe dual port enterprise SSD optimization Oct 10, 2021 Issued
Array ( [id] => 17345858 [patent_doc_number] => 20220012189 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-13 [patent_title] => SHARING MEMORY AND I/O SERVICES BETWEEN NODES [patent_app_type] => utility [patent_app_number] => 17/485360 [patent_app_country] => US [patent_app_date] => 2021-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19635 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17485360 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/485360
SHARING MEMORY AND I/O SERVICES BETWEEN NODES Sep 24, 2021 Pending
Array ( [id] => 19812197 [patent_doc_number] => 12243606 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-04 [patent_title] => Semiconductor device, memory system and method of controlling semiconductor device thereof [patent_app_type] => utility [patent_app_number] => 17/483508 [patent_app_country] => US [patent_app_date] => 2021-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5780 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17483508 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/483508
Semiconductor device, memory system and method of controlling semiconductor device thereof Sep 22, 2021 Issued
Array ( [id] => 18269963 [patent_doc_number] => 20230091205 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => MEMORY SIDE PREFETCH ARCHITECTURE FOR IMPROVED MEMORY BANDWIDTH [patent_app_type] => utility [patent_app_number] => 17/479582 [patent_app_country] => US [patent_app_date] => 2021-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7987 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17479582 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/479582
MEMORY SIDE PREFETCH ARCHITECTURE FOR IMPROVED MEMORY BANDWIDTH Sep 19, 2021 Pending
Menu