Search

James Largen

Examiner (ID: 14395)

Most Active Art Unit
2901
Art Unit(s)
2902, 2903, 2901, 2904, 2900
Total Applications
2691
Issued Applications
2645
Pending Applications
1
Abandoned Applications
45

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14522327 [patent_doc_number] => 10338417 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-02 [patent_title] => Measurement techniques for ion impurities in liquid crystal mixtures [patent_app_type] => utility [patent_app_number] => 15/600412 [patent_app_country] => US [patent_app_date] => 2017-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6069 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15600412 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/600412
Measurement techniques for ion impurities in liquid crystal mixtures May 18, 2017 Issued
Array ( [id] => 15104537 [patent_doc_number] => 10473587 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-12 [patent_title] => On-chip, wideband, differentially fed antennas with integrated bias structures [patent_app_type] => utility [patent_app_number] => 15/598844 [patent_app_country] => US [patent_app_date] => 2017-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 3499 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15598844 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/598844
On-chip, wideband, differentially fed antennas with integrated bias structures May 17, 2017 Issued
Array ( [id] => 12060131 [patent_doc_number] => 20170336475 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-23 [patent_title] => 'MONITORING DEVICE AND MONITORING METHOD' [patent_app_type] => utility [patent_app_number] => 15/597589 [patent_app_country] => US [patent_app_date] => 2017-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5375 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15597589 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/597589
Monitoring device and monitoring method for a switching element May 16, 2017 Issued
Array ( [id] => 12060110 [patent_doc_number] => 20170336454 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-23 [patent_title] => 'ANTENNA MEASUREMENT SYSTEM AND ANTENNA MEASUREMENT METHOD' [patent_app_type] => utility [patent_app_number] => 15/594787 [patent_app_country] => US [patent_app_date] => 2017-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10319 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15594787 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/594787
Antenna measurement system and antenna measurement method May 14, 2017 Issued
Array ( [id] => 14854797 [patent_doc_number] => 10416118 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-09-17 [patent_title] => Measurement system and method of use [patent_app_type] => utility [patent_app_number] => 15/594004 [patent_app_country] => US [patent_app_date] => 2017-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 27 [patent_no_of_words] => 9623 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15594004 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/594004
Measurement system and method of use May 11, 2017 Issued
Array ( [id] => 13750891 [patent_doc_number] => 10168383 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-01 [patent_title] => Testing printed circuit board assembly [patent_app_type] => utility [patent_app_number] => 15/593811 [patent_app_country] => US [patent_app_date] => 2017-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8347 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15593811 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/593811
Testing printed circuit board assembly May 11, 2017 Issued
Array ( [id] => 15397905 [patent_doc_number] => 10539607 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-21 [patent_title] => Evaluation apparatus including a plurality of insulating portions surrounding a probe and semiconductor device evaluation method based thereon [patent_app_type] => utility [patent_app_number] => 15/588783 [patent_app_country] => US [patent_app_date] => 2017-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 7073 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15588783 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/588783
Evaluation apparatus including a plurality of insulating portions surrounding a probe and semiconductor device evaluation method based thereon May 7, 2017 Issued
Array ( [id] => 12645009 [patent_doc_number] => 20180106834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-19 [patent_title] => TEST FIXTURE AND TEST SYSTEM APPLICABLE TO ELECTRONIC DEVICE HAVING UNIVERSAL SERIAL BUS TYPE-C RECEPTACLE, AND METHOD FOR PERFORMING TESTING ON ELECTRONIC DEVICE WITH AID OF TEST FIXTURE [patent_app_type] => utility [patent_app_number] => 15/585178 [patent_app_country] => US [patent_app_date] => 2017-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4517 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15585178 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/585178
TEST FIXTURE AND TEST SYSTEM APPLICABLE TO ELECTRONIC DEVICE HAVING UNIVERSAL SERIAL BUS TYPE-C RECEPTACLE, AND METHOD FOR PERFORMING TESTING ON ELECTRONIC DEVICE WITH AID OF TEST FIXTURE May 2, 2017 Abandoned
Array ( [id] => 16637952 [patent_doc_number] => 10916467 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => Apparatus having on-chip fail safe logic for I/O signal in high integrity functional safety applications [patent_app_type] => utility [patent_app_number] => 15/584500 [patent_app_country] => US [patent_app_date] => 2017-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3705 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15584500 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/584500
Apparatus having on-chip fail safe logic for I/O signal in high integrity functional safety applications May 1, 2017 Issued
Array ( [id] => 15756313 [patent_doc_number] => 10620260 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-14 [patent_title] => Apparatus having signal chain lock step for high integrity functional safety applications [patent_app_type] => utility [patent_app_number] => 15/584550 [patent_app_country] => US [patent_app_date] => 2017-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4342 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15584550 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/584550
Apparatus having signal chain lock step for high integrity functional safety applications May 1, 2017 Issued
Array ( [id] => 12843073 [patent_doc_number] => 20180172864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-21 [patent_title] => CONTENT DETECTION DEVICES [patent_app_type] => utility [patent_app_number] => 15/584124 [patent_app_country] => US [patent_app_date] => 2017-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6495 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15584124 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/584124
Content detection devices May 1, 2017 Issued
Array ( [id] => 13539561 [patent_doc_number] => 20180321327 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-08 [patent_title] => Battery Testing Assembly [patent_app_type] => utility [patent_app_number] => 15/584082 [patent_app_country] => US [patent_app_date] => 2017-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1432 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15584082 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/584082
Battery Testing Assembly May 1, 2017 Abandoned
Array ( [id] => 12866512 [patent_doc_number] => 20180180679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-28 [patent_title] => NON-CONTACT INTELLIGENT BATTERY SENSING SYSTEM AND METHOD [patent_app_type] => utility [patent_app_number] => 15/498624 [patent_app_country] => US [patent_app_date] => 2017-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5347 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15498624 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/498624
Non-contact intelligent battery sensing system and method Apr 26, 2017 Issued
Array ( [id] => 14147877 [patent_doc_number] => 10254310 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-09 [patent_title] => Electrical probe with a probe head and contacting pins [patent_app_type] => utility [patent_app_number] => 15/497840 [patent_app_country] => US [patent_app_date] => 2017-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3794 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15497840 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/497840
Electrical probe with a probe head and contacting pins Apr 25, 2017 Issued
Array ( [id] => 13147009 [patent_doc_number] => 10090846 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-02 [patent_title] => Control apparatus [patent_app_type] => utility [patent_app_number] => 15/497648 [patent_app_country] => US [patent_app_date] => 2017-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7597 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15497648 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/497648
Control apparatus Apr 25, 2017 Issued
Array ( [id] => 12983821 [patent_doc_number] => 20170343603 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-30 [patent_title] => MULTI-LAYER INTEGRATED CIRCUITS HAVING ISOLATION CELLS FOR LAYER TESTING AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 15/497389 [patent_app_country] => US [patent_app_date] => 2017-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10993 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -28 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15497389 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/497389
Multi-layer integrated circuits having isolation cells for layer testing and related methods Apr 25, 2017 Issued
Array ( [id] => 12003534 [patent_doc_number] => 20170307689 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-26 [patent_title] => 'CONTROLLER AND ANOMALY DIAGNOSTIC DEVICE' [patent_app_type] => utility [patent_app_number] => 15/493372 [patent_app_country] => US [patent_app_date] => 2017-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11265 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15493372 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/493372
Controller and anomaly diagnostic device Apr 20, 2017 Issued
Array ( [id] => 12983830 [patent_doc_number] => 20170343607 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-30 [patent_title] => SEMICONDUCTOR DEVICE, ELECTRONIC CONTROL SYSTEM AND METHOD FOR EVALUATING ELECTRONIC CONTROL SYSTEM [patent_app_type] => utility [patent_app_number] => 15/493311 [patent_app_country] => US [patent_app_date] => 2017-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9070 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15493311 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/493311
Semiconductor device, electronic control system and method for evaluating electronic control system Apr 20, 2017 Issued
Array ( [id] => 14248675 [patent_doc_number] => 10274534 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-30 [patent_title] => Chip and reading circuit for die ID in chip [patent_app_type] => utility [patent_app_number] => 15/493369 [patent_app_country] => US [patent_app_date] => 2017-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5780 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15493369 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/493369
Chip and reading circuit for die ID in chip Apr 20, 2017 Issued
Array ( [id] => 15057449 [patent_doc_number] => 10459023 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-29 [patent_title] => System and method to determine stress levels in harvesting machine circuits [patent_app_type] => utility [patent_app_number] => 15/492166 [patent_app_country] => US [patent_app_date] => 2017-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5128 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15492166 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/492166
System and method to determine stress levels in harvesting machine circuits Apr 19, 2017 Issued
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