
James M. Mitchell
Supervisory Patent Examiner (ID: 10382, Phone: (571)272-1931 , Office: P/4100 )
| Most Active Art Unit | 2813 |
| Art Unit(s) | 2813, 2827, 4100, 2822, 4127 |
| Total Applications | 769 |
| Issued Applications | 540 |
| Pending Applications | 13 |
| Abandoned Applications | 218 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9153502
[patent_doc_number] => 08586408
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-11-19
[patent_title] => 'Contact and method of formation'
[patent_app_type] => utility
[patent_app_number] => 13/291882
[patent_app_country] => US
[patent_app_date] => 2011-11-08
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13291882
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/291882 | Contact and method of formation | Nov 7, 2011 | Issued |
Array
(
[id] => 8193074
[patent_doc_number] => 20120119376
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-17
[patent_title] => 'SEMICONDUCTOR CHIPS AND METHODS OF FORMING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/289624
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[firstpage_image] =>[orig_patent_app_number] => 13289624
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/289624 | SEMICONDUCTOR CHIPS AND METHODS OF FORMING THE SAME | Nov 3, 2011 | Abandoned |
Array
(
[id] => 8812039
[patent_doc_number] => 20130113084
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-09
[patent_title] => 'SEMICONDUCTOR SUBSTRATE WITH MOLDED SUPPORT LAYER'
[patent_app_type] => utility
[patent_app_number] => 13/289761
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Array
(
[id] => 8730195
[patent_doc_number] => 20130075764
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-03-28
[patent_title] => 'OPTICAL MODULE PACKAGE STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 13/288747
[patent_app_country] => US
[patent_app_date] => 2011-11-03
[patent_effective_date] => 0000-00-00
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Array
(
[id] => 9227403
[patent_doc_number] => 08633071
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[patent_kind] => B2
[patent_issue_date] => 2014-01-21
[patent_title] => 'Silicon device on Si: C-oi and Sgoi and method of manufacture'
[patent_app_type] => utility
[patent_app_number] => 13/278667
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/278667 | Silicon device on Si: C-oi and Sgoi and method of manufacture | Oct 20, 2011 | Issued |
Array
(
[id] => 9376307
[patent_doc_number] => 08680572
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[patent_issue_date] => 2014-03-25
[patent_title] => 'Microdisplay packaging system'
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[patent_app_number] => 13/273011
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/273011 | Microdisplay packaging system | Oct 12, 2011 | Issued |
Array
(
[id] => 9608154
[patent_doc_number] => 08785321
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[patent_issue_date] => 2014-07-22
[patent_title] => 'Low resistance and reliable copper interconnects by variable doping'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/249823 | Low resistance and reliable copper interconnects by variable doping | Sep 29, 2011 | Issued |
Array
(
[id] => 7815223
[patent_doc_number] => 20120061843
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[patent_issue_date] => 2012-03-15
[patent_title] => 'SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/228591
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[firstpage_image] =>[orig_patent_app_number] => 13228591
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/228591 | Semiconductor package and method for manufacturing the same | Sep 8, 2011 | Issued |
Array
(
[id] => 9455860
[patent_doc_number] => 08716874
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[patent_title] => 'Semiconductor device having metal posts non-overlapping with other devices and layout method of semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 13/228583
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Array
(
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[patent_title] => 'Power semiconductor component and method for the production thereof'
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Array
(
[id] => 7666822
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[patent_title] => 'Semiconductor Devices, Assemblies And Constructions'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/224804 | Semiconductor devices, assemblies and constructions | Sep 1, 2011 | Issued |
Array
(
[id] => 9876037
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[patent_issue_date] => 2015-02-24
[patent_title] => 'Low cost hybrid high density package'
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[patent_app_number] => 13/216918
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/216918 | Low cost hybrid high density package | Aug 23, 2011 | Issued |
Array
(
[id] => 8680912
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[patent_issue_date] => 2013-02-28
[patent_title] => 'THROUGH INTERPOSER WIRE BOND USING LOW CTE INTERPOSER WITH COARSE SLOT APERTURES'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/216465 | Through interposer wire bond using low CTE interposer with coarse slot apertures | Aug 23, 2011 | Issued |
Array
(
[id] => 9112917
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/216825 | Semiconductor device and method of dicing semiconductor devices | Aug 23, 2011 | Issued |
Array
(
[id] => 7787834
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Array
(
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Array
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Array
(
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/214069 | Method and apparatus for achieving galvanic isolation in package having integral isolation medium | Aug 18, 2011 | Issued |