
James M. Mitchell
Supervisory Patent Examiner (ID: 19356, Phone: (571)272-1931 , Office: P/4100 )
| Most Active Art Unit | 2813 |
| Art Unit(s) | 4100, 2827, 2822, 2813, 4127 |
| Total Applications | 769 |
| Issued Applications | 540 |
| Pending Applications | 13 |
| Abandoned Applications | 218 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5834784
[patent_doc_number] => 20060246615
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-11-02
[patent_title] => 'Method of manufacturing vertical cavity surface emitting laser'
[patent_app_type] => utility
[patent_app_number] => 11/115285
[patent_app_country] => US
[patent_app_date] => 2005-04-27
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[pdf_file] => publications/A1/0246/20060246615.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/115285 | Method of manufacturing vertical cavity surface emitting laser | Apr 26, 2005 | Abandoned |
Array
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[patent_doc_number] => 20060148227
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[patent_title] => 'Method for fabricating a first contact hole plane in a memory module'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/115385 | Method for fabricating a first contact hole plane in a memory module | Apr 26, 2005 | Abandoned |
Array
(
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[patent_issue_date] => 2006-10-12
[patent_title] => 'Semiconductor device and fabricating method thereof'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/104266 | Semiconductor device and fabricating method thereof | Apr 11, 2005 | Abandoned |
Array
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[patent_title] => 'Metal-insulator-metal capacitor having a large capacitance and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/097165
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Array
(
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[patent_title] => 'Methods of forming metal interconnections of semiconductor devices by treating a barrier metal layer'
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[patent_app_number] => 11/095006
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/095006 | Methods of forming metal interconnections of semiconductor devices by treating a barrier metal layer | Mar 30, 2005 | Issued |
Array
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[patent_title] => 'High performance system-on-chip using post passivation process'
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Array
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[patent_title] => 'Scaffold-organized clusters and electronic devices made using such clusters'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/094049 | Scaffold-organized clusters and electronic devices made using such clusters | Mar 28, 2005 | Issued |
Array
(
[id] => 881092
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[patent_issue_date] => 2008-04-08
[patent_title] => 'Memory circuitry with oxygen diffusion barrier layer received over a well base'
[patent_app_type] => utility
[patent_app_number] => 11/091260
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/091260 | Memory circuitry with oxygen diffusion barrier layer received over a well base | Mar 27, 2005 | Issued |
Array
(
[id] => 5697597
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[patent_title] => 'Stress absorption layer and cylinder solder joint method and apparatus'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/089995 | Stress absorption layer and cylinder solder joint method and apparatus | Mar 24, 2005 | Issued |
Array
(
[id] => 5760287
[patent_doc_number] => 20060211232
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[patent_issue_date] => 2006-09-21
[patent_title] => 'Method for Manufacturing Gold Bumps'
[patent_app_type] => utility
[patent_app_number] => 10/907005
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/907005 | Method for Manufacturing Gold Bumps | Mar 15, 2005 | Abandoned |
Array
(
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[patent_title] => 'METHOD FOR WAFER LEVEL PACKAGING'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/906935 | METHOD FOR WAFER LEVEL PACKAGING | Mar 13, 2005 | Abandoned |
Array
(
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Array
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Array
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Array
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Array
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Array
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