
James M. Mitchell
Supervisory Patent Examiner (ID: 15731, Phone: (571)272-1931 , Office: P/4100 )
| Most Active Art Unit | 2813 |
| Art Unit(s) | 2813, 4100, 2827, 2822, 4127 |
| Total Applications | 769 |
| Issued Applications | 540 |
| Pending Applications | 13 |
| Abandoned Applications | 218 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6838917
[patent_doc_number] => 20030036257
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-02-20
[patent_title] => 'Semiconductor device manufacturing method'
[patent_app_type] => new
[patent_app_number] => 10/215803
[patent_app_country] => US
[patent_app_date] => 2002-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3282
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 40
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0036/20030036257.pdf
[firstpage_image] =>[orig_patent_app_number] => 10215803
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/215803 | Semiconductor device manufacturing method | Aug 8, 2002 | Abandoned |
Array
(
[id] => 1071870
[patent_doc_number] => 06841454
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-01-11
[patent_title] => 'Chip-like electronic components, a method of manufacturing the same, a pseudo wafer therefor and a method of manufacturing thereof'
[patent_app_type] => utility
[patent_app_number] => 10/216508
[patent_app_country] => US
[patent_app_date] => 2002-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 32
[patent_no_of_words] => 8015
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/841/06841454.pdf
[firstpage_image] =>[orig_patent_app_number] => 10216508
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/216508 | Chip-like electronic components, a method of manufacturing the same, a pseudo wafer therefor and a method of manufacturing thereof | Aug 8, 2002 | Issued |
Array
(
[id] => 6713388
[patent_doc_number] => 20030024735
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-02-06
[patent_title] => 'Protective device for subassemblies and method for producing a protective device'
[patent_app_type] => new
[patent_app_number] => 10/210218
[patent_app_country] => US
[patent_app_date] => 2002-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 4300
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0024/20030024735.pdf
[firstpage_image] =>[orig_patent_app_number] => 10210218
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/210218 | Protective device for subassemblies and method for producing a protective device | Jul 31, 2002 | Issued |
Array
(
[id] => 6260522
[patent_doc_number] => 20020187590
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-12
[patent_title] => 'Ball grid array packages with thermally conductive containers'
[patent_app_type] => new
[patent_app_number] => 10/209753
[patent_app_country] => US
[patent_app_date] => 2002-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2890
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 26
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0187/20020187590.pdf
[firstpage_image] =>[orig_patent_app_number] => 10209753
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/209753 | Ball grid array packages with thermally conductive containers | Jul 30, 2002 | Issued |
Array
(
[id] => 1056400
[patent_doc_number] => 06855623
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-02-15
[patent_title] => 'Recessed tape and method for forming a BGA assembly'
[patent_app_type] => utility
[patent_app_number] => 10/206518
[patent_app_country] => US
[patent_app_date] => 2002-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 13
[patent_no_of_words] => 5094
[patent_no_of_claims] => 64
[patent_no_of_ind_claims] => 16
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/855/06855623.pdf
[firstpage_image] =>[orig_patent_app_number] => 10206518
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/206518 | Recessed tape and method for forming a BGA assembly | Jul 25, 2002 | Issued |
Array
(
[id] => 6745235
[patent_doc_number] => 20030022418
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-30
[patent_title] => 'Sealing apparatus for semiconductor wafer and method of manufacturing semiconductor device by using the sealing apparatus'
[patent_app_type] => new
[patent_app_number] => 10/202024
[patent_app_country] => US
[patent_app_date] => 2002-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3609
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0022/20030022418.pdf
[firstpage_image] =>[orig_patent_app_number] => 10202024
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/202024 | Sealing apparatus for semiconductor wafer and method of manufacturing semiconductor device by using sealing apparatus | Jul 24, 2002 | Issued |
Array
(
[id] => 616841
[patent_doc_number] => 07145254
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-12-05
[patent_title] => 'Transfer-molded power device and method for manufacturing transfer-molded power device'
[patent_app_type] => utility
[patent_app_number] => 10/201556
[patent_app_country] => US
[patent_app_date] => 2002-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 42
[patent_no_of_words] => 10070
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/145/07145254.pdf
[firstpage_image] =>[orig_patent_app_number] => 10201556
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/201556 | Transfer-molded power device and method for manufacturing transfer-molded power device | Jul 23, 2002 | Issued |
Array
(
[id] => 6385386
[patent_doc_number] => 20020180008
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-05
[patent_title] => 'Leads under chip in conventional IC package'
[patent_app_type] => new
[patent_app_number] => 10/200847
[patent_app_country] => US
[patent_app_date] => 2002-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4541
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 264
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0180/20020180008.pdf
[firstpage_image] =>[orig_patent_app_number] => 10200847
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/200847 | Leads under chip in conventional IC package | Jul 21, 2002 | Abandoned |
Array
(
[id] => 6748098
[patent_doc_number] => 20030042618
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-03-06
[patent_title] => 'Semiconductor device and a method of manufacturing the same'
[patent_app_type] => new
[patent_app_number] => 10/195493
[patent_app_country] => US
[patent_app_date] => 2002-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 8234
[patent_no_of_claims] => 44
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0042/20030042618.pdf
[firstpage_image] =>[orig_patent_app_number] => 10195493
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/195493 | Semiconductor device and a method of manufacturing the same | Jul 15, 2002 | Abandoned |
Array
(
[id] => 7427744
[patent_doc_number] => 20040007779
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-01-15
[patent_title] => 'Wafer-level method for fine-pitch, high aspect ratio chip interconnect'
[patent_app_type] => new
[patent_app_number] => 10/195273
[patent_app_country] => US
[patent_app_date] => 2002-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5109
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0007/20040007779.pdf
[firstpage_image] =>[orig_patent_app_number] => 10195273
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/195273 | Wafer-level method for fine-pitch, high aspect ratio chip interconnect | Jul 14, 2002 | Abandoned |
Array
(
[id] => 7357257
[patent_doc_number] => 20040004294
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-01-08
[patent_title] => 'Underfilled, encapsulated semiconductor die assemblies and methods of fabrication'
[patent_app_type] => new
[patent_app_number] => 10/191655
[patent_app_country] => US
[patent_app_date] => 2002-07-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5204
[patent_no_of_claims] => 63
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0004/20040004294.pdf
[firstpage_image] =>[orig_patent_app_number] => 10191655
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/191655 | Methods of fabricating underfilled, encapsulated semiconductor die assemblies | Jul 7, 2002 | Issued |
Array
(
[id] => 732388
[patent_doc_number] => 07037733
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-05-02
[patent_title] => 'Method for measuring temperature, annealing method and method for fabricating semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 10/343762
[patent_app_country] => US
[patent_app_date] => 2002-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 9481
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/037/07037733.pdf
[firstpage_image] =>[orig_patent_app_number] => 10343762
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/343762 | Method for measuring temperature, annealing method and method for fabricating semiconductor device | Jun 30, 2002 | Issued |
Array
(
[id] => 7421188
[patent_doc_number] => 20040000698
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-01-01
[patent_title] => 'CMOS MODULE FOR USED IN AN OPTICAL MOUSE'
[patent_app_type] => new
[patent_app_number] => 10/184885
[patent_app_country] => US
[patent_app_date] => 2002-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 1424
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0000/20040000698.pdf
[firstpage_image] =>[orig_patent_app_number] => 10184885
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/184885 | CMOS MODULE FOR USED IN AN OPTICAL MOUSE | Jun 30, 2002 | Abandoned |
Array
(
[id] => 6854210
[patent_doc_number] => 20030127711
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-07-10
[patent_title] => 'Lead frame, method for manufacturing the same, resin-encapsulated semiconductor device and method for manufacturing the same'
[patent_app_type] => new
[patent_app_number] => 10/173900
[patent_app_country] => US
[patent_app_date] => 2002-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 48
[patent_figures_cnt] => 48
[patent_no_of_words] => 17787
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0127/20030127711.pdf
[firstpage_image] =>[orig_patent_app_number] => 10173900
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/173900 | Resin encapsulated semiconductor device and method for manufacturing the same | Jun 18, 2002 | Issued |
Array
(
[id] => 612730
[patent_doc_number] => 07148127
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-12-12
[patent_title] => 'Device mounting substrate and method of repairing defective device'
[patent_app_type] => utility
[patent_app_number] => 10/165387
[patent_app_country] => US
[patent_app_date] => 2002-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 43
[patent_no_of_words] => 10200
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/148/07148127.pdf
[firstpage_image] =>[orig_patent_app_number] => 10165387
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/165387 | Device mounting substrate and method of repairing defective device | Jun 5, 2002 | Issued |
Array
(
[id] => 6385524
[patent_doc_number] => 20020180025
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-05
[patent_title] => 'Semiconductor device and method of stacking semiconductor chips'
[patent_app_type] => new
[patent_app_number] => 10/156821
[patent_app_country] => US
[patent_app_date] => 2002-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 8938
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 48
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0180/20020180025.pdf
[firstpage_image] =>[orig_patent_app_number] => 10156821
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/156821 | Semiconductor device and method of stacking semiconductor chips | May 29, 2002 | Abandoned |
Array
(
[id] => 6701661
[patent_doc_number] => 20030224541
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-12-04
[patent_title] => 'Method of monitoring high tilt angle of medium current implant'
[patent_app_type] => new
[patent_app_number] => 10/157558
[patent_app_country] => US
[patent_app_date] => 2002-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 4210
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0224/20030224541.pdf
[firstpage_image] =>[orig_patent_app_number] => 10157558
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/157558 | Method of monitoring high tilt angle of medium current implant | May 28, 2002 | Issued |
Array
(
[id] => 6753505
[patent_doc_number] => 20030001281
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-02
[patent_title] => 'Stacked chip package having upper chip provided with trenches and method of manufacturing the same'
[patent_app_type] => new
[patent_app_number] => 10/157272
[patent_app_country] => US
[patent_app_date] => 2002-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3273
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0001/20030001281.pdf
[firstpage_image] =>[orig_patent_app_number] => 10157272
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/157272 | Stacked chip package having upper chip provided with trenches and method of manufacturing the same | May 27, 2002 | Issued |
Array
(
[id] => 634591
[patent_doc_number] => 07129578
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-10-31
[patent_title] => 'Substrate for semiconductor device, manufacturing method thereof, semiconductor device, and frame main body'
[patent_app_type] => utility
[patent_app_number] => 10/152855
[patent_app_country] => US
[patent_app_date] => 2002-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 14
[patent_no_of_words] => 6705
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 264
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/129/07129578.pdf
[firstpage_image] =>[orig_patent_app_number] => 10152855
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/152855 | Substrate for semiconductor device, manufacturing method thereof, semiconductor device, and frame main body | May 22, 2002 | Issued |
Array
(
[id] => 1025595
[patent_doc_number] => 06885104
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-04-26
[patent_title] => 'Semiconductor copper bond pad surface protection'
[patent_app_type] => utility
[patent_app_number] => 10/153451
[patent_app_country] => US
[patent_app_date] => 2002-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2755
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/885/06885104.pdf
[firstpage_image] =>[orig_patent_app_number] => 10153451
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/153451 | Semiconductor copper bond pad surface protection | May 21, 2002 | Issued |