James M. Mitchell

Array ( [id] => 6428672 [patent_doc_number] => 20020175500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-28 [patent_title] => 'Airbag module' [patent_app_type] => new [patent_app_number] => 10/152892 [patent_app_country] => US [patent_app_date] => 2002-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1763 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0175/20020175500.pdf [firstpage_image] =>[orig_patent_app_number] => 10152892 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6767677 [patent_doc_number] => 20030213617 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-20 [patent_title] => 'Method and structure of a reducing intra-level and inter-level capacitance of a semiconductor device' [patent_app_type] => new [patent_app_number] => 10/152305 [patent_app_country] => US [patent_app_date] => 2002-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3577 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20030213617.pdf [firstpage_image] =>[orig_patent_app_number] => 10152305 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6845384 [patent_doc_number] => 20030164551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-04 [patent_title] => 'Method and apparatus for flip-chip packaging providing testing capability' [patent_app_type] => new [patent_app_number] => 10/150892 [patent_app_country] => US [patent_app_date] => 2002-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10406 [patent_no_of_claims] => 82 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20030164551.pdf [firstpage_image] =>[orig_patent_app_number] => 10150892 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6415469 [patent_doc_number] => 20020125562 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-12 [patent_title] => 'Attaching semiconductor dies to substrates with conductive straps' [patent_app_type] => new [patent_app_number] => 10/146846 [patent_app_country] => US [patent_app_date] => 2002-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3479 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20020125562.pdf [firstpage_image] =>[orig_patent_app_number] => 10146846 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6612159 [patent_doc_number] => 20030209801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-13 [patent_title] => 'Reactive solder material' [patent_app_type] => new [patent_app_number] => 10/141735 [patent_app_country] => US [patent_app_date] => 2002-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3443 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0209/20030209801.pdf [firstpage_image] =>[orig_patent_app_number] => 10141735 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 820908 [patent_doc_number] => 07408242 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-05 [patent_title] => 'Carrier with reinforced leads that are to be connected to a chip' [patent_app_type] => utility [patent_app_number] => 10/139344 [patent_app_country] => US [patent_app_date] => 2002-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 25 [patent_no_of_words] => 7751 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/408/07408242.pdf [firstpage_image] =>[orig_patent_app_number] => 10139344 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7610976 [patent_doc_number] => 06841881 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-11 [patent_title] => 'Semiconductor device and a method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 10/132239 [patent_app_country] => US [patent_app_date] => 2002-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 50 [patent_no_of_words] => 6998 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/841/06841881.pdf [firstpage_image] =>[orig_patent_app_number] => 10132239 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6808093 [patent_doc_number] => 20030198032 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-23 [patent_title] => 'Integrated circuit assembly and method for making same' [patent_app_type] => new [patent_app_number] => 10/127685 [patent_app_country] => US [patent_app_date] => 2002-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3875 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20030198032.pdf [firstpage_image] =>[orig_patent_app_number] => 10127685 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5782927 [patent_doc_number] => 20020158341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-31 [patent_title] => 'Semiconductor package' [patent_app_type] => new [patent_app_number] => 10/123211 [patent_app_country] => US [patent_app_date] => 2002-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5728 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20020158341.pdf [firstpage_image] =>[orig_patent_app_number] => 10123211 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 143211 [patent_doc_number] => 07692291 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-06 [patent_title] => 'Circuit board having a heating means and a hermetically sealed multi-chip package' [patent_app_type] => utility [patent_app_number] => 10/121515 [patent_app_country] => US [patent_app_date] => 2002-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3009 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/692/07692291.pdf [firstpage_image] =>[orig_patent_app_number] => 10121515 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6863719 [patent_doc_number] => 20030189245 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-09 [patent_title] => 'Flip chip assembly and method for producing the same' [patent_app_type] => new [patent_app_number] => 10/118002 [patent_app_country] => US [patent_app_date] => 2002-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2384 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20030189245.pdf [firstpage_image] =>[orig_patent_app_number] => 10118002 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1410734 [patent_doc_number] => 06534859 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-18 [patent_title] => 'Semiconductor package having heat sink attached to pre-molded cavities and method for creating the package' [patent_app_type] => B1 [patent_app_number] => 10/116983 [patent_app_country] => US [patent_app_date] => 2002-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 4731 [patent_no_of_claims] => 63 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 412 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/534/06534859.pdf [firstpage_image] =>[orig_patent_app_number] => 10116983 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1126375 [patent_doc_number] => 06790684 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-14 [patent_title] => 'Wafer on wafer packaging and method of fabrication for full-wafer burn-in and testing' [patent_app_type] => B2 [patent_app_number] => 10/114134 [patent_app_country] => US [patent_app_date] => 2002-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 9671 [patent_no_of_claims] => 117 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/790/06790684.pdf [firstpage_image] =>[orig_patent_app_number] => 10114134 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6758863 [patent_doc_number] => 20030122224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'Lead frame with dual thin film coated on inner lead terminal' [patent_app_type] => new [patent_app_number] => 10/114607 [patent_app_country] => US [patent_app_date] => 2002-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1620 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20030122224.pdf [firstpage_image] =>[orig_patent_app_number] => 10114607 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6849375 [patent_doc_number] => 20030141577 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-31 [patent_title] => 'Short-prevented lead frame and method for fabricating semiconductor package with the same' [patent_app_type] => new [patent_app_number] => 10/109781 [patent_app_country] => US [patent_app_date] => 2002-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3411 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20030141577.pdf [firstpage_image] =>[orig_patent_app_number] => 10109781 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5901136 [patent_doc_number] => 20020140096 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-03 [patent_title] => 'Method and structure for ex-situ polymer stud grid array contact formation' [patent_app_type] => new [patent_app_number] => 10/112849 [patent_app_country] => US [patent_app_date] => 2002-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 8202 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20020140096.pdf [firstpage_image] =>[orig_patent_app_number] => 10112849 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7428923 [patent_doc_number] => 20040209403 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-21 [patent_title] => 'One-component hot setting epoxy resin composition and semiconductor mounting underfill material' [patent_app_type] => new [patent_app_number] => 10/472191 [patent_app_country] => US [patent_app_date] => 2004-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2472 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0209/20040209403.pdf [firstpage_image] =>[orig_patent_app_number] => 10472191 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1056944 [patent_doc_number] => 06856006 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-15 [patent_title] => 'Encapsulation method and leadframe for leadless semiconductor packages' [patent_app_type] => utility [patent_app_number] => 10/113526 [patent_app_country] => US [patent_app_date] => 2002-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1924 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/856/06856006.pdf [firstpage_image] =>[orig_patent_app_number] => 10113526 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6385842 [patent_doc_number] => 20020180064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'Metallized surface wafer level package structure' [patent_app_type] => new [patent_app_number] => 10/107219 [patent_app_country] => US [patent_app_date] => 2002-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2797 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20020180064.pdf [firstpage_image] =>[orig_patent_app_number] => 10107219 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6727721 [patent_doc_number] => 20030183911 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-02 [patent_title] => 'Electronic package and method' [patent_app_type] => new [patent_app_number] => 10/108680 [patent_app_country] => US [patent_app_date] => 2002-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1580 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20030183911.pdf [firstpage_image] =>[orig_patent_app_number] => 10108680 [rel_patent_id] =>[rel_patent_doc_number] =>)