Search

James M. Mitchell

Supervisory Patent Examiner (ID: 15731, Phone: (571)272-1931 , Office: P/4100 )

Most Active Art Unit
2813
Art Unit(s)
2813, 4100, 2827, 2822, 4127
Total Applications
769
Issued Applications
540
Pending Applications
13
Abandoned Applications
218

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6758883 [patent_doc_number] => 20030122244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'Integrated chip package structure using metal substrate and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/055560 [patent_app_country] => US [patent_app_date] => 2002-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6553 [patent_no_of_claims] => 138 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20030122244.pdf [firstpage_image] =>[orig_patent_app_number] => 10055560 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/055560
Integrated chip package structure using metal substrate and method of manufacturing the same Jan 21, 2002 Issued
Array ( [id] => 7627857 [patent_doc_number] => 06806581 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-19 [patent_title] => 'Bonded anisotropic conductive film' [patent_app_type] => B2 [patent_app_number] => 10/047681 [patent_app_country] => US [patent_app_date] => 2002-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2381 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 7 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/806/06806581.pdf [firstpage_image] =>[orig_patent_app_number] => 10047681 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/047681
Bonded anisotropic conductive film Jan 13, 2002 Issued
Array ( [id] => 1414077 [patent_doc_number] => 06521479 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-18 [patent_title] => 'Repackaging semiconductor IC devices for failure analysis' [patent_app_type] => B1 [patent_app_number] => 10/044024 [patent_app_country] => US [patent_app_date] => 2002-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 3572 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/521/06521479.pdf [firstpage_image] =>[orig_patent_app_number] => 10044024 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/044024
Repackaging semiconductor IC devices for failure analysis Jan 10, 2002 Issued
Array ( [id] => 5919707 [patent_doc_number] => 20020114143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-22 [patent_title] => 'Chip-scale packages stacked on folded interconnector for vertical assembly on substrates' [patent_app_type] => new [patent_app_number] => 10/034827 [patent_app_country] => US [patent_app_date] => 2002-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4870 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0114/20020114143.pdf [firstpage_image] =>[orig_patent_app_number] => 10034827 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/034827
Chip-scale packages stacked on folded interconnector for vertical assembly on substrates Jan 2, 2002 Abandoned
Array ( [id] => 6680996 [patent_doc_number] => 20030116860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-26 [patent_title] => 'Semiconductor package with low resistance package-to-die interconnect scheme for reduced die stresses' [patent_app_type] => new [patent_app_number] => 10/023723 [patent_app_country] => US [patent_app_date] => 2001-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2238 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0116/20030116860.pdf [firstpage_image] =>[orig_patent_app_number] => 10023723 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/023723
Semiconductor package with low resistance package-to-die interconnect scheme for reduced die stresses Dec 20, 2001 Abandoned
Array ( [id] => 6680482 [patent_doc_number] => 20030116346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-26 [patent_title] => 'Low cost area array probe for circuits having solder-ball contacts are manufactured using a wire bonding machine' [patent_app_type] => new [patent_app_number] => 10/026052 [patent_app_country] => US [patent_app_date] => 2001-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3511 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0116/20030116346.pdf [firstpage_image] =>[orig_patent_app_number] => 10026052 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/026052
Low cost area array probe for circuits having solder-ball contacts are manufactured using a wire bonding machine Dec 20, 2001 Abandoned
Array ( [id] => 6242429 [patent_doc_number] => 20020045292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-18 [patent_title] => 'Semiconductor device, method for manufacturing same and portable device' [patent_app_type] => new [patent_app_number] => 10/022542 [patent_app_country] => US [patent_app_date] => 2001-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3371 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0045/20020045292.pdf [firstpage_image] =>[orig_patent_app_number] => 10022542 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/022542
Semiconductor device, method for manufacturing same and portable device Dec 19, 2001 Abandoned
Array ( [id] => 1109051 [patent_doc_number] => 06809411 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-26 [patent_title] => 'Low-inductance semiconductor components' [patent_app_type] => B2 [patent_app_number] => 10/023189 [patent_app_country] => US [patent_app_date] => 2001-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2806 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 367 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/809/06809411.pdf [firstpage_image] =>[orig_patent_app_number] => 10023189 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/023189
Low-inductance semiconductor components Dec 16, 2001 Issued
Array ( [id] => 1083535 [patent_doc_number] => 06833629 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-21 [patent_title] => 'Dual cure B-stageable underfill for wafer level' [patent_app_type] => B2 [patent_app_number] => 10/020638 [patent_app_country] => US [patent_app_date] => 2001-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3945 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/833/06833629.pdf [firstpage_image] =>[orig_patent_app_number] => 10020638 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/020638
Dual cure B-stageable underfill for wafer level Dec 13, 2001 Issued
Array ( [id] => 6205430 [patent_doc_number] => 20020070446 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-13 [patent_title] => 'Semiconductor device and method for the production thereof' [patent_app_type] => new [patent_app_number] => 10/012778 [patent_app_country] => US [patent_app_date] => 2001-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10591 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20020070446.pdf [firstpage_image] =>[orig_patent_app_number] => 10012778 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/012778
Semiconductor device and method for the production thereof Dec 9, 2001 Abandoned
Array ( [id] => 1415298 [patent_doc_number] => 06518090 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-02-11 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => B2 [patent_app_number] => 10/000482 [patent_app_country] => US [patent_app_date] => 2001-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 22 [patent_no_of_words] => 8804 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/518/06518090.pdf [firstpage_image] =>[orig_patent_app_number] => 10000482 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/000482
Semiconductor device and manufacturing method thereof Dec 3, 2001 Issued
Array ( [id] => 6123575 [patent_doc_number] => 20020074654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-20 [patent_title] => 'Wiring substrate, wiring board, and wiring substrate mounting structure' [patent_app_type] => new [patent_app_number] => 09/996349 [patent_app_country] => US [patent_app_date] => 2001-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4340 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20020074654.pdf [firstpage_image] =>[orig_patent_app_number] => 09996349 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/996349
Wiring substrate, wiring board, and wiring substrate mounting structure Nov 26, 2001 Abandoned
Array ( [id] => 1545064 [patent_doc_number] => 06444498 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'Method of making semiconductor package with heat spreader' [patent_app_type] => B1 [patent_app_number] => 09/990752 [patent_app_country] => US [patent_app_date] => 2001-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 5081 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/444/06444498.pdf [firstpage_image] =>[orig_patent_app_number] => 09990752 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/990752
Method of making semiconductor package with heat spreader Nov 14, 2001 Issued
Array ( [id] => 5933510 [patent_doc_number] => 20020060372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-23 [patent_title] => 'IC chip' [patent_app_type] => new [patent_app_number] => 10/010164 [patent_app_country] => US [patent_app_date] => 2001-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5040 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0060/20020060372.pdf [firstpage_image] =>[orig_patent_app_number] => 10010164 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/010164
IC chip Nov 12, 2001 Abandoned
Array ( [id] => 1104764 [patent_doc_number] => 06812064 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-02 [patent_title] => 'Ozone treatment of a ground semiconductor die to improve adhesive bonding to a substrate' [patent_app_type] => B2 [patent_app_number] => 10/008136 [patent_app_country] => US [patent_app_date] => 2001-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 5269 [patent_no_of_claims] => 72 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/812/06812064.pdf [firstpage_image] =>[orig_patent_app_number] => 10008136 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/008136
Ozone treatment of a ground semiconductor die to improve adhesive bonding to a substrate Nov 6, 2001 Issued
Array ( [id] => 6790111 [patent_doc_number] => 20030085455 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-08 [patent_title] => 'Thermal ring used in 3-D stacking' [patent_app_type] => new [patent_app_number] => 09/994002 [patent_app_country] => US [patent_app_date] => 2001-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3497 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20030085455.pdf [firstpage_image] =>[orig_patent_app_number] => 09994002 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/994002
Thermal ring used in 3-D stacking Nov 5, 2001 Abandoned
Array ( [id] => 1141529 [patent_doc_number] => 06777312 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-17 [patent_title] => 'Wafer-level transfer of membranes in semiconductor processing' [patent_app_type] => B2 [patent_app_number] => 10/005765 [patent_app_country] => US [patent_app_date] => 2001-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 32 [patent_no_of_words] => 3108 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/777/06777312.pdf [firstpage_image] =>[orig_patent_app_number] => 10005765 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/005765
Wafer-level transfer of membranes in semiconductor processing Nov 1, 2001 Issued
Array ( [id] => 6867748 [patent_doc_number] => 20030080437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-01 [patent_title] => 'Electronic assembly with filled no-flow underfill and methods of manufacture' [patent_app_type] => new [patent_app_number] => 10/003238 [patent_app_country] => US [patent_app_date] => 2001-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5378 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20030080437.pdf [firstpage_image] =>[orig_patent_app_number] => 10003238 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/003238
Electronic assemblies with filled no-flow underfill Oct 25, 2001 Issued
Array ( [id] => 5933507 [patent_doc_number] => 20020060370 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-23 [patent_title] => 'Die attach curing method for semiconductor device' [patent_app_type] => new [patent_app_number] => 09/960945 [patent_app_country] => US [patent_app_date] => 2001-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2181 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0060/20020060370.pdf [firstpage_image] =>[orig_patent_app_number] => 09960945 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/960945
Die attach curing method for semiconductor device Sep 24, 2001 Issued
Array ( [id] => 1083349 [patent_doc_number] => 06833563 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-21 [patent_title] => 'Multi-stack surface mount light emitting diodes' [patent_app_type] => B2 [patent_app_number] => 09/965234 [patent_app_country] => US [patent_app_date] => 2001-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 2550 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/833/06833563.pdf [firstpage_image] =>[orig_patent_app_number] => 09965234 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/965234
Multi-stack surface mount light emitting diodes Sep 24, 2001 Issued
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