Search

James M. Mitchell

Supervisory Patent Examiner (ID: 15731, Phone: (571)272-1931 , Office: P/4100 )

Most Active Art Unit
2813
Art Unit(s)
2813, 4100, 2827, 2822, 4127
Total Applications
769
Issued Applications
540
Pending Applications
13
Abandoned Applications
218

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6300617 [patent_doc_number] => 20020093091 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-18 [patent_title] => 'Method of fabricating a ground-ball bonding structure without trapped air for tape ball grid array application' [patent_app_type] => new [patent_app_number] => 09/838521 [patent_app_country] => US [patent_app_date] => 2001-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3060 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20020093091.pdf [firstpage_image] =>[orig_patent_app_number] => 09838521 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/838521
Method of fabricating a ground-ball bonding structure without trapped air for tape ball grid array application Apr 18, 2001 Abandoned
Array ( [id] => 7090964 [patent_doc_number] => 20010033018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-25 [patent_title] => 'Semiconductor device, its manufacturing method and electrodeposition frame' [patent_app_type] => new [patent_app_number] => 09/837022 [patent_app_country] => US [patent_app_date] => 2001-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4608 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20010033018.pdf [firstpage_image] =>[orig_patent_app_number] => 09837022 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/837022
Semiconductor device, its manufacturing method and electrodeposition frame Apr 17, 2001 Issued
Array ( [id] => 6920616 [patent_doc_number] => 20010028101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-11 [patent_title] => 'Method of fabricating semiconductor having through hole' [patent_app_type] => new [patent_app_number] => 09/836182 [patent_app_country] => US [patent_app_date] => 2001-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5592 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20010028101.pdf [firstpage_image] =>[orig_patent_app_number] => 09836182 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/836182
Method of fabricating semiconductor having through hole Apr 17, 2001 Abandoned
Array ( [id] => 5885331 [patent_doc_number] => 20020011350 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-31 [patent_title] => 'Semiconductor apparatus' [patent_app_type] => new [patent_app_number] => 09/835713 [patent_app_country] => US [patent_app_date] => 2001-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3893 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0011/20020011350.pdf [firstpage_image] =>[orig_patent_app_number] => 09835713 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/835713
Semiconductor apparatus Apr 15, 2001 Issued
Array ( [id] => 734314 [patent_doc_number] => 07038315 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-02 [patent_title] => 'Semiconductor chip package' [patent_app_type] => utility [patent_app_number] => 09/834696 [patent_app_country] => US [patent_app_date] => 2001-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2536 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/038/07038315.pdf [firstpage_image] =>[orig_patent_app_number] => 09834696 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/834696
Semiconductor chip package Apr 11, 2001 Issued
Array ( [id] => 6469704 [patent_doc_number] => 20020151164 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-17 [patent_title] => 'Structure and method for depositing solder bumps on a wafer' [patent_app_type] => new [patent_app_number] => 09/834273 [patent_app_country] => US [patent_app_date] => 2001-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6045 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 17 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20020151164.pdf [firstpage_image] =>[orig_patent_app_number] => 09834273 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/834273
Structure and method for depositing solder bumps on a wafer Apr 11, 2001 Abandoned
Array ( [id] => 6893127 [patent_doc_number] => 20010015493 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-23 [patent_title] => 'Chip on board with heat sink attachment' [patent_app_type] => new [patent_app_number] => 09/834297 [patent_app_country] => US [patent_app_date] => 2001-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5361 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20010015493.pdf [firstpage_image] =>[orig_patent_app_number] => 09834297 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/834297
Chip on board with heat sink attachment and assembly Apr 11, 2001 Issued
Array ( [id] => 6723516 [patent_doc_number] => 20030205828 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2003-11-06 [patent_title] => 'CIRCUIT SUBSTRATES, SEMICONDUCTOR PACKAGES, AND BALL GRID ARRAYS' [patent_app_type] => corrected [patent_app_number] => 09/827017 [patent_app_country] => US [patent_app_date] => 2001-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2314 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A9/0205/20030205828.pdf [firstpage_image] =>[orig_patent_app_number] => 09827017 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/827017
Transfer mold semiconductor packaging processes, circuit substrates, semiconductor packages, and ball grid arrays Apr 4, 2001 Abandoned
Array ( [id] => 6723516 [patent_doc_number] => 20030205828 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2003-11-06 [patent_title] => 'CIRCUIT SUBSTRATES, SEMICONDUCTOR PACKAGES, AND BALL GRID ARRAYS' [patent_app_type] => corrected [patent_app_number] => 09/827017 [patent_app_country] => US [patent_app_date] => 2001-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2314 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A9/0205/20030205828.pdf [firstpage_image] =>[orig_patent_app_number] => 09827017 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/827017
CIRCUIT SUBSTRATES, SEMICONDUCTOR PACKAGES, AND BALL GRID ARRAYS Apr 3, 2001 Abandoned
Array ( [id] => 1032570 [patent_doc_number] => 06879492 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-12 [patent_title] => 'Hyperbga buildup laminate' [patent_app_type] => utility [patent_app_number] => 09/819457 [patent_app_country] => US [patent_app_date] => 2001-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4831 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/879/06879492.pdf [firstpage_image] =>[orig_patent_app_number] => 09819457 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/819457
Hyperbga buildup laminate Mar 27, 2001 Issued
Array ( [id] => 790867 [patent_doc_number] => 06984891 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-10 [patent_title] => 'Methods for making copper and other metal interconnections in integrated circuits' [patent_app_type] => utility [patent_app_number] => 09/817447 [patent_app_country] => US [patent_app_date] => 2001-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 3132 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/984/06984891.pdf [firstpage_image] =>[orig_patent_app_number] => 09817447 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/817447
Methods for making copper and other metal interconnections in integrated circuits Mar 25, 2001 Issued
Array ( [id] => 6888533 [patent_doc_number] => 20010023988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-09-27 [patent_title] => 'Semiconductor device' [patent_app_type] => new [patent_app_number] => 09/816177 [patent_app_country] => US [patent_app_date] => 2001-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5159 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20010023988.pdf [firstpage_image] =>[orig_patent_app_number] => 09816177 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/816177
Semiconductor device Mar 25, 2001 Issued
Array ( [id] => 964009 [patent_doc_number] => 06949822 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-27 [patent_title] => 'Semiconductor multichip module package with improved thermal performance; reduced size and improved moisture resistance' [patent_app_type] => utility [patent_app_number] => 09/812027 [patent_app_country] => US [patent_app_date] => 2001-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1100 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/949/06949822.pdf [firstpage_image] =>[orig_patent_app_number] => 09812027 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/812027
Semiconductor multichip module package with improved thermal performance; reduced size and improved moisture resistance Mar 18, 2001 Issued
Array ( [id] => 975987 [patent_doc_number] => 06933604 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-23 [patent_title] => 'Semiconductor device, semiconductor module and hard disk' [patent_app_type] => utility [patent_app_number] => 09/810117 [patent_app_country] => US [patent_app_date] => 2001-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 9070 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/933/06933604.pdf [firstpage_image] =>[orig_patent_app_number] => 09810117 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/810117
Semiconductor device, semiconductor module and hard disk Mar 15, 2001 Issued
Array ( [id] => 659610 [patent_doc_number] => 07105884 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-12 [patent_title] => 'Memory circuitry with plurality of capacitors received within an insulative layer well' [patent_app_type] => utility [patent_app_number] => 09/810595 [patent_app_country] => US [patent_app_date] => 2001-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 2688 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/105/07105884.pdf [firstpage_image] =>[orig_patent_app_number] => 09810595 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/810595
Memory circuitry with plurality of capacitors received within an insulative layer well Mar 14, 2001 Issued
Array ( [id] => 6434380 [patent_doc_number] => 20020127771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-12 [patent_title] => 'Multiple die package' [patent_app_type] => new [patent_app_number] => 09/804051 [patent_app_country] => US [patent_app_date] => 2001-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5486 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 22 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20020127771.pdf [firstpage_image] =>[orig_patent_app_number] => 09804051 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/804051
Multiple die package Mar 11, 2001 Abandoned
Array ( [id] => 7632684 [patent_doc_number] => 06664650 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-16 [patent_title] => 'Method of forming an alignment key on a semiconductor wafer' [patent_app_type] => B2 [patent_app_number] => 09/790587 [patent_app_country] => US [patent_app_date] => 2001-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 2163 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/664/06664650.pdf [firstpage_image] =>[orig_patent_app_number] => 09790587 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/790587
Method of forming an alignment key on a semiconductor wafer Feb 22, 2001 Issued
Array ( [id] => 7118409 [patent_doc_number] => 20010001714 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-05-24 [patent_title] => 'Semiconductor device having a ball grid array and a fabrication process thereof' [patent_app_type] => new-utility [patent_app_number] => 09/768174 [patent_app_country] => US [patent_app_date] => 2001-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4672 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20010001714.pdf [firstpage_image] =>[orig_patent_app_number] => 09768174 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/768174
Semiconductor device having a ball grid array and a fabrication process thereof Jan 23, 2001 Abandoned
Array ( [id] => 7063533 [patent_doc_number] => 20010042910 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-22 [patent_title] => 'Vertical ball grid array integrated circuit package' [patent_app_type] => new [patent_app_number] => 09/766477 [patent_app_country] => US [patent_app_date] => 2001-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6404 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20010042910.pdf [firstpage_image] =>[orig_patent_app_number] => 09766477 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/766477
Vertical ball grid array integrated circuit package Jan 18, 2001 Abandoned
Array ( [id] => 6894049 [patent_doc_number] => 20010016415 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-23 [patent_title] => 'Method of improving copper pad adhesion' [patent_app_type] => new [patent_app_number] => 09/755282 [patent_app_country] => US [patent_app_date] => 2001-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5038 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20010016415.pdf [firstpage_image] =>[orig_patent_app_number] => 09755282 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/755282
Method of improving copper pad adhesion Jan 7, 2001 Issued
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