Search

Jane T. Fan

Examiner (ID: 1876)

Most Active Art Unit
1201
Art Unit(s)
1205, 1625, 1201, 1203, 1612
Total Applications
1767
Issued Applications
1387
Pending Applications
66
Abandoned Applications
314

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4776473 [patent_doc_number] => 20080284471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-20 [patent_title] => 'Current load driving circuit' [patent_app_type] => utility [patent_app_number] => 12/153046 [patent_app_country] => US [patent_app_date] => 2008-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10256 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20080284471.pdf [firstpage_image] =>[orig_patent_app_number] => 12153046 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/153046
Current load driving circuit May 12, 2008 Abandoned
Array ( [id] => 5313973 [patent_doc_number] => 20090278571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-12 [patent_title] => 'DEVICE AND TECHNIQUE FOR TRANSISTOR WELL BIASING' [patent_app_type] => utility [patent_app_number] => 12/115825 [patent_app_country] => US [patent_app_date] => 2008-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5550 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0278/20090278571.pdf [firstpage_image] =>[orig_patent_app_number] => 12115825 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/115825
Device and technique for transistor well biasing May 5, 2008 Issued
Array ( [id] => 4837718 [patent_doc_number] => 20080278219 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-13 [patent_title] => 'BIAS SWITCHING CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/116154 [patent_app_country] => US [patent_app_date] => 2008-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7055 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0278/20080278219.pdf [firstpage_image] =>[orig_patent_app_number] => 12116154 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/116154
BIAS SWITCHING CIRCUIT May 5, 2008 Abandoned
Array ( [id] => 4958409 [patent_doc_number] => 20080272833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-06 [patent_title] => 'Charge Pump' [patent_app_type] => utility [patent_app_number] => 12/114283 [patent_app_country] => US [patent_app_date] => 2008-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2807 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0272/20080272833.pdf [firstpage_image] =>[orig_patent_app_number] => 12114283 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/114283
Charge Pump May 1, 2008 Abandoned
Array ( [id] => 7595035 [patent_doc_number] => 07626426 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-12-01 [patent_title] => 'Differential comparator with a replica input stage to set the accurate bias current for improved common mode rejection' [patent_app_type] => utility [patent_app_number] => 12/113634 [patent_app_country] => US [patent_app_date] => 2008-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4246 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/626/07626426.pdf [firstpage_image] =>[orig_patent_app_number] => 12113634 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/113634
Differential comparator with a replica input stage to set the accurate bias current for improved common mode rejection Apr 30, 2008 Issued
Array ( [id] => 7979023 [patent_doc_number] => 08072259 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-12-06 [patent_title] => 'Voltage reference and supply voltage level detector circuits using proportional to absolute temperature cells' [patent_app_type] => utility [patent_app_number] => 12/112933 [patent_app_country] => US [patent_app_date] => 2008-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 8454 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 327 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/072/08072259.pdf [firstpage_image] =>[orig_patent_app_number] => 12112933 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/112933
Voltage reference and supply voltage level detector circuits using proportional to absolute temperature cells Apr 29, 2008 Issued
Array ( [id] => 4857113 [patent_doc_number] => 20080265963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-30 [patent_title] => 'CASCADED PHASE SHIFTER' [patent_app_type] => utility [patent_app_number] => 12/109986 [patent_app_country] => US [patent_app_date] => 2008-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3669 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0265/20080265963.pdf [firstpage_image] =>[orig_patent_app_number] => 12109986 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/109986
CASCADED PHASE SHIFTER Apr 24, 2008 Abandoned
Array ( [id] => 8329372 [patent_doc_number] => 08237481 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-07 [patent_title] => 'Low power programmable clock delay generator with integrated decode function' [patent_app_type] => utility [patent_app_number] => 12/109728 [patent_app_country] => US [patent_app_date] => 2008-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1777 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 333 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12109728 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/109728
Low power programmable clock delay generator with integrated decode function Apr 24, 2008 Issued
Array ( [id] => 9883503 [patent_doc_number] => 08970275 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-03-03 [patent_title] => 'Process compensated delay line' [patent_app_type] => utility [patent_app_number] => 12/107091 [patent_app_country] => US [patent_app_date] => 2008-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3047 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12107091 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/107091
Process compensated delay line Apr 21, 2008 Issued
Array ( [id] => 4716008 [patent_doc_number] => 20080238530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'Semiconductor Device Generating Voltage for Temperature Compensation' [patent_app_type] => utility [patent_app_number] => 12/076991 [patent_app_country] => US [patent_app_date] => 2008-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 13649 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20080238530.pdf [firstpage_image] =>[orig_patent_app_number] => 12076991 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/076991
Semiconductor Device Generating Voltage for Temperature Compensation Mar 25, 2008 Abandoned
Array ( [id] => 4811141 [patent_doc_number] => 20080191772 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-14 [patent_title] => 'Clock Correction Circuit and Method' [patent_app_type] => utility [patent_app_number] => 12/028523 [patent_app_country] => US [patent_app_date] => 2008-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7809 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0191/20080191772.pdf [firstpage_image] =>[orig_patent_app_number] => 12028523 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/028523
Clock Correction Circuit and Method Feb 7, 2008 Abandoned
Array ( [id] => 8083401 [patent_doc_number] => 08149022 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-03 [patent_title] => 'Digital delay line based frequency synthesizer' [patent_app_type] => utility [patent_app_number] => 12/021306 [patent_app_country] => US [patent_app_date] => 2008-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6882 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/149/08149022.pdf [firstpage_image] =>[orig_patent_app_number] => 12021306 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/021306
Digital delay line based frequency synthesizer Jan 28, 2008 Issued
Array ( [id] => 4953033 [patent_doc_number] => 20080186057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-07 [patent_title] => 'LOW FREQUENCY DETECTOR INCLUDING COMMON INPUT VOLTAGE SENSOR' [patent_app_type] => utility [patent_app_number] => 12/020975 [patent_app_country] => US [patent_app_date] => 2008-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3621 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20080186057.pdf [firstpage_image] =>[orig_patent_app_number] => 12020975 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/020975
LOW FREQUENCY DETECTOR INCLUDING COMMON INPUT VOLTAGE SENSOR Jan 27, 2008 Abandoned
Array ( [id] => 5341020 [patent_doc_number] => 20090179670 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-16 [patent_title] => 'PERFORMANCE INVERSION DETECTION CIRCUIT AND A DESIGN STRUCTURE FOR THE SAME' [patent_app_type] => utility [patent_app_number] => 12/014430 [patent_app_country] => US [patent_app_date] => 2008-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8000 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20090179670.pdf [firstpage_image] =>[orig_patent_app_number] => 12014430 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/014430
PERFORMANCE INVERSION DETECTION CIRCUIT AND A DESIGN STRUCTURE FOR THE SAME Jan 14, 2008 Abandoned
Array ( [id] => 4806269 [patent_doc_number] => 20080169847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-17 [patent_title] => 'DRIVER AND DRIVER/RECEIVER SYSTEM' [patent_app_type] => utility [patent_app_number] => 11/972239 [patent_app_country] => US [patent_app_date] => 2008-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 12265 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20080169847.pdf [firstpage_image] =>[orig_patent_app_number] => 11972239 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/972239
DRIVER AND DRIVER/RECEIVER SYSTEM Jan 9, 2008 Abandoned
Array ( [id] => 5579124 [patent_doc_number] => 20090174470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-09 [patent_title] => 'LATCH-UP PROTECTION DEVICE' [patent_app_type] => utility [patent_app_number] => 11/971385 [patent_app_country] => US [patent_app_date] => 2008-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4157 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20090174470.pdf [firstpage_image] =>[orig_patent_app_number] => 11971385 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/971385
LATCH-UP PROTECTION DEVICE Jan 8, 2008 Abandoned
Array ( [id] => 4715968 [patent_doc_number] => 20080238490 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/967547 [patent_app_country] => US [patent_app_date] => 2007-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4042 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20080238490.pdf [firstpage_image] =>[orig_patent_app_number] => 11967547 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/967547
SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING THE SAME Dec 30, 2007 Abandoned
Array ( [id] => 4963500 [patent_doc_number] => 20080106320 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-08 [patent_title] => 'Inverter Apparatus' [patent_app_type] => utility [patent_app_number] => 11/962608 [patent_app_country] => US [patent_app_date] => 2007-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4472 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20080106320.pdf [firstpage_image] =>[orig_patent_app_number] => 11962608 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/962608
Inverter apparatus Dec 20, 2007 Issued
Array ( [id] => 4763149 [patent_doc_number] => 20080174359 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-24 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/942939 [patent_app_country] => US [patent_app_date] => 2007-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 13718 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20080174359.pdf [firstpage_image] =>[orig_patent_app_number] => 11942939 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/942939
SEMICONDUCTOR INTEGRATED CIRCUIT Nov 19, 2007 Abandoned
Array ( [id] => 4897340 [patent_doc_number] => 20080116953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-22 [patent_title] => 'FLIP-FLOP CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/943059 [patent_app_country] => US [patent_app_date] => 2007-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7239 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0116/20080116953.pdf [firstpage_image] =>[orig_patent_app_number] => 11943059 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/943059
FLIP-FLOP CIRCUIT Nov 19, 2007 Abandoned
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