Search

Jane T. Fan

Examiner (ID: 1918)

Most Active Art Unit
1201
Art Unit(s)
1625, 1205, 1201, 1203, 1612
Total Applications
1767
Issued Applications
1387
Pending Applications
66
Abandoned Applications
314

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19123586 [patent_doc_number] => 11967580 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Microelectronic assemblies with communication networks [patent_app_type] => utility [patent_app_number] => 17/956773 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 56 [patent_figures_cnt] => 72 [patent_no_of_words] => 26658 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17956773 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/956773
Microelectronic assemblies with communication networks Sep 28, 2022 Issued
Array ( [id] => 18500515 [patent_doc_number] => 20230223309 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => METHOD OF MANUFACTURE OF FAN-OUT TYPE SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 17/953092 [patent_app_country] => US [patent_app_date] => 2022-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11789 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17953092 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/953092
Method of manufacture of fan-out type semiconductor package Sep 25, 2022 Issued
Array ( [id] => 19943637 [patent_doc_number] => 12315773 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-27 [patent_title] => Chip scale package (CSP) process [patent_app_type] => utility [patent_app_number] => 17/951161 [patent_app_country] => US [patent_app_date] => 2022-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 0 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17951161 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/951161
Chip scale package (CSP) process Sep 22, 2022 Issued
Array ( [id] => 19054810 [patent_doc_number] => 20240096779 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => FLEXIBLE PACKAGE [patent_app_type] => utility [patent_app_number] => 17/949142 [patent_app_country] => US [patent_app_date] => 2022-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6961 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17949142 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/949142
FLEXIBLE PACKAGE Sep 19, 2022 Pending
Array ( [id] => 18112928 [patent_doc_number] => 20230005808 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-05 [patent_title] => SEMICONDUCTOR CHIP PACKAGE AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/901849 [patent_app_country] => US [patent_app_date] => 2022-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4909 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17901849 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/901849
Semiconductor chip package and fabrication method thereof Aug 31, 2022 Issued
Array ( [id] => 18891068 [patent_doc_number] => 11869845 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Semiconductor package device and semiconductor wiring substrate thereof [patent_app_type] => utility [patent_app_number] => 17/823063 [patent_app_country] => US [patent_app_date] => 2022-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4278 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17823063 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/823063
Semiconductor package device and semiconductor wiring substrate thereof Aug 28, 2022 Issued
Array ( [id] => 20638132 [patent_doc_number] => 12599031 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-07 [patent_title] => Semiconductor package and method [patent_app_type] => utility [patent_app_number] => 17/822476 [patent_app_country] => US [patent_app_date] => 2022-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 23 [patent_no_of_words] => 2253 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17822476 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/822476
Semiconductor package and method Aug 25, 2022 Issued
Array ( [id] => 18082935 [patent_doc_number] => 20220408547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => MANUFACTURING METHOD OF EMBEDDED COMPONENT STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/896053 [patent_app_country] => US [patent_app_date] => 2022-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4680 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17896053 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/896053
MANUFACTURING METHOD OF EMBEDDED COMPONENT STRUCTURE Aug 24, 2022 Abandoned
Array ( [id] => 18891058 [patent_doc_number] => 11869835 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Semiconductor package [patent_app_type] => utility [patent_app_number] => 17/892215 [patent_app_country] => US [patent_app_date] => 2022-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 33 [patent_no_of_words] => 8614 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17892215 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/892215
Semiconductor package Aug 21, 2022 Issued
Array ( [id] => 18991152 [patent_doc_number] => 20240063121 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => BACKSIDE CONTACT FOR SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/889357 [patent_app_country] => US [patent_app_date] => 2022-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8059 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17889357 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/889357
Backside contact for semiconductor device Aug 15, 2022 Issued
Array ( [id] => 18040086 [patent_doc_number] => 20220384303 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => INTEGRATED CIRCUIT STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/884272 [patent_app_country] => US [patent_app_date] => 2022-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20227 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17884272 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/884272
Integrated circuit structure Aug 8, 2022 Issued
Array ( [id] => 20229312 [patent_doc_number] => 12417968 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-16 [patent_title] => Package structure and forming method thereof [patent_app_type] => utility [patent_app_number] => 17/880686 [patent_app_country] => US [patent_app_date] => 2022-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 2159 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17880686 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/880686
Package structure and forming method thereof Aug 3, 2022 Issued
Array ( [id] => 18943552 [patent_doc_number] => 20240038691 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => MICROELECTRONIC DEVICE PACKAGE WITH INTEGRAL ANTENNA MODULE AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/877426 [patent_app_country] => US [patent_app_date] => 2022-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9291 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -28 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17877426 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/877426
Microelectronic device package with integral antenna module and semiconductor device Jul 28, 2022 Issued
Array ( [id] => 18067986 [patent_doc_number] => 20220399074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-15 [patent_title] => COMPUTATIONAL ANALYSIS OF BIOLOGICAL DATA USING MANIFOLD AND A HYPERPLANE [patent_app_type] => utility [patent_app_number] => 17/875467 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 46026 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17875467 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/875467
Computational analysis of biological data using manifold and a hyperplane Jul 27, 2022 Issued
Array ( [id] => 18857113 [patent_doc_number] => 11854704 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Systems and methods for anatomical modeling using information obtained from a medical procedure [patent_app_type] => utility [patent_app_number] => 17/812935 [patent_app_country] => US [patent_app_date] => 2022-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10791 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17812935 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/812935
Systems and methods for anatomical modeling using information obtained from a medical procedure Jul 14, 2022 Issued
Array ( [id] => 17986317 [patent_doc_number] => 20220352354 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => METHOD OF MAKING SEMICONDUCTOR DEVICE COMPRISING FLASH MEMORY AND RESULTING DEVICE [patent_app_type] => utility [patent_app_number] => 17/865113 [patent_app_country] => US [patent_app_date] => 2022-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5199 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17865113 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/865113
Method of making semiconductor device comprising flash memory and resulting device Jul 13, 2022 Issued
Array ( [id] => 19935045 [patent_doc_number] => 12308253 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-20 [patent_title] => Molded product for semiconductor strip and method of manufacturing semiconductor package [patent_app_type] => utility [patent_app_number] => 17/862662 [patent_app_country] => US [patent_app_date] => 2022-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 3275 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17862662 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/862662
Molded product for semiconductor strip and method of manufacturing semiconductor package Jul 11, 2022 Issued
Array ( [id] => 17963878 [patent_doc_number] => 20220344459 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-27 [patent_title] => SOURCE/DRAIN REGIONS IN INTEGRATED CIRCUIT STRUCTURES [patent_app_type] => utility [patent_app_number] => 17/862094 [patent_app_country] => US [patent_app_date] => 2022-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14751 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17862094 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/862094
Source/drain regions in integrated circuit structures Jul 10, 2022 Issued
Array ( [id] => 18967496 [patent_doc_number] => 11901277 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-13 [patent_title] => Semiconductor package and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/857032 [patent_app_country] => US [patent_app_date] => 2022-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 13523 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17857032 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/857032
Semiconductor package and method of manufacturing the same Jul 2, 2022 Issued
Array ( [id] => 17933342 [patent_doc_number] => 20220328468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => SEMICONDUCTOR STRUCTURE HAVING PHOTONIC DIE AND ELECTRONIC DIE [patent_app_type] => utility [patent_app_number] => 17/849731 [patent_app_country] => US [patent_app_date] => 2022-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10563 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17849731 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/849731
Semiconductor structure having photonic die and electronic die Jun 26, 2022 Issued
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