Search

Jany Richardson

Examiner (ID: 7533, Phone: (571)270-5074 , Office: P/2844 )

Most Active Art Unit
2844
Art Unit(s)
2819, 2844, 2845, 4125
Total Applications
1293
Issued Applications
1166
Pending Applications
48
Abandoned Applications
94

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18292835 [patent_doc_number] => 11621711 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-04 [patent_title] => Low area and high speed termination detection circuit with voltage clamping [patent_app_type] => utility [patent_app_number] => 17/374319 [patent_app_country] => US [patent_app_date] => 2021-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 6879 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17374319 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/374319
Low area and high speed termination detection circuit with voltage clamping Jul 12, 2021 Issued
Array ( [id] => 17574838 [patent_doc_number] => 11323117 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-05-03 [patent_title] => Data sampling with loop-unrolled decision feedback equalization [patent_app_type] => utility [patent_app_number] => 17/305571 [patent_app_country] => US [patent_app_date] => 2021-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9712 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17305571 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/305571
Data sampling with loop-unrolled decision feedback equalization Jul 8, 2021 Issued
Array ( [id] => 17955087 [patent_doc_number] => 11481192 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-10-25 [patent_title] => Dual-domain combinational logic circuitry [patent_app_type] => utility [patent_app_number] => 17/363940 [patent_app_country] => US [patent_app_date] => 2021-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7960 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17363940 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/363940
Dual-domain combinational logic circuitry Jun 29, 2021 Issued
Array ( [id] => 19581633 [patent_doc_number] => 12147751 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-19 [patent_title] => Integrated circuit and method of designing the same [patent_app_type] => utility [patent_app_number] => 17/360355 [patent_app_country] => US [patent_app_date] => 2021-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 11118 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17360355 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/360355
Integrated circuit and method of designing the same Jun 27, 2021 Issued
Array ( [id] => 17159610 [patent_doc_number] => 20210320661 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-14 [patent_title] => SOFT NETWORK-ON-CHIP OVERLAY THROUGH A PARTIAL RECONFIGURATION REGION [patent_app_type] => utility [patent_app_number] => 17/357869 [patent_app_country] => US [patent_app_date] => 2021-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8724 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17357869 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/357869
Soft network-on-chip overlay through a partial reconfiguration region Jun 23, 2021 Issued
Array ( [id] => 18804631 [patent_doc_number] => 11837800 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-05 [patent_title] => Antenna unit and electronic device [patent_app_type] => utility [patent_app_number] => 17/356570 [patent_app_country] => US [patent_app_date] => 2021-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 28 [patent_no_of_words] => 8483 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17356570 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/356570
Antenna unit and electronic device Jun 23, 2021 Issued
Array ( [id] => 18053078 [patent_doc_number] => 11526463 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-13 [patent_title] => Analog processor comprising quantum devices [patent_app_type] => utility [patent_app_number] => 17/355458 [patent_app_country] => US [patent_app_date] => 2021-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 31 [patent_no_of_words] => 20852 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17355458 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/355458
Analog processor comprising quantum devices Jun 22, 2021 Issued
Array ( [id] => 19918782 [patent_doc_number] => 12294164 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-06 [patent_title] => RFID antenna module [patent_app_type] => utility [patent_app_number] => 18/019073 [patent_app_country] => US [patent_app_date] => 2021-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 0 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18019073 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/019073
RFID antenna module Jun 22, 2021 Issued
Array ( [id] => 17971972 [patent_doc_number] => 11489527 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Three dimensional programmable logic circuit systems and methods [patent_app_type] => utility [patent_app_number] => 17/354473 [patent_app_country] => US [patent_app_date] => 2021-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6140 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17354473 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/354473
Three dimensional programmable logic circuit systems and methods Jun 21, 2021 Issued
Array ( [id] => 19277933 [patent_doc_number] => 12028067 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-02 [patent_title] => Complementary 2(N)-bit redundancy for single event upset prevention [patent_app_type] => utility [patent_app_number] => 17/757926 [patent_app_country] => US [patent_app_date] => 2021-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10609 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17757926 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/757926
Complementary 2(N)-bit redundancy for single event upset prevention Jun 20, 2021 Issued
Array ( [id] => 17599056 [patent_doc_number] => 20220148630 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => IMPEDANCE CALIBRATION CIRCUIT AND METHOD OF CALIBRATING IMPEDANCE IN MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/352527 [patent_app_country] => US [patent_app_date] => 2021-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17292 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17352527 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/352527
Impedance calibration circuit and method of calibrating impedance in memory device Jun 20, 2021 Issued
Array ( [id] => 17145978 [patent_doc_number] => 20210313991 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => Circuit Systems And Methods For Reducing Power Supply Voltage Droop [patent_app_type] => utility [patent_app_number] => 17/350577 [patent_app_country] => US [patent_app_date] => 2021-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8159 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17350577 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/350577
Circuit systems and methods for reducing power supply voltage droop Jun 16, 2021 Issued
Array ( [id] => 17834449 [patent_doc_number] => 20220271753 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => CLOCK TREE, HASH ENGINE, COMPUTING CHIP, HASH BOARD AND DATA PROCESSING DEVICE [patent_app_type] => utility [patent_app_number] => 17/627028 [patent_app_country] => US [patent_app_date] => 2021-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8177 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17627028 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/627028
Clock tree, hash engine, computing chip, hash board and data processing device Jun 15, 2021 Issued
Array ( [id] => 17131214 [patent_doc_number] => 20210305983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => Multi-Termination Scheme Interface [patent_app_type] => utility [patent_app_number] => 17/345984 [patent_app_country] => US [patent_app_date] => 2021-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4121 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -28 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17345984 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/345984
Multi-termination scheme interface Jun 10, 2021 Issued
Array ( [id] => 17347865 [patent_doc_number] => 20220014196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-13 [patent_title] => LOW VOLTAGE DIFFERENTIAL SIGNALING DRIVER [patent_app_type] => utility [patent_app_number] => 17/343164 [patent_app_country] => US [patent_app_date] => 2021-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5637 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17343164 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/343164
Low voltage differential signaling driver Jun 8, 2021 Issued
Array ( [id] => 17484957 [patent_doc_number] => 20220092461 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => Performing a Calibration Process in a Quantum Computing System [patent_app_type] => utility [patent_app_number] => 17/338024 [patent_app_country] => US [patent_app_date] => 2021-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15901 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17338024 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/338024
Performing a calibration process in a quantum computing system Jun 2, 2021 Issued
Array ( [id] => 17683890 [patent_doc_number] => 11368156 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-21 [patent_title] => Method and apparatus for providing field-programmable gate array (FPGA) integrated circuit (IC) package [patent_app_type] => utility [patent_app_number] => 17/334985 [patent_app_country] => US [patent_app_date] => 2021-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8525 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17334985 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/334985
Method and apparatus for providing field-programmable gate array (FPGA) integrated circuit (IC) package May 30, 2021 Issued
Array ( [id] => 17717222 [patent_doc_number] => 11381225 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-07-05 [patent_title] => Single ended receiver [patent_app_type] => utility [patent_app_number] => 17/324113 [patent_app_country] => US [patent_app_date] => 2021-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2486 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17324113 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/324113
Single ended receiver May 18, 2021 Issued
Array ( [id] => 17070228 [patent_doc_number] => 20210272445 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-02 [patent_title] => AUTOMATED TESTING OF EMERGENCY LIGHTS [patent_app_type] => utility [patent_app_number] => 17/324238 [patent_app_country] => US [patent_app_date] => 2021-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6448 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17324238 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/324238
Automated testing of emergency lights May 18, 2021 Issued
Array ( [id] => 17591363 [patent_doc_number] => 11329649 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-10 [patent_title] => Port controller device [patent_app_type] => utility [patent_app_number] => 17/315391 [patent_app_country] => US [patent_app_date] => 2021-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4348 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17315391 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/315391
Port controller device May 9, 2021 Issued
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