
Jared Ian Rutz
Supervisory Patent Examiner (ID: 17554, Phone: (571)272-5535 , Office: P/2133 )
| Most Active Art Unit | 2187 |
| Art Unit(s) | 2187, 2135, 2133 |
| Total Applications | 485 |
| Issued Applications | 375 |
| Pending Applications | 34 |
| Abandoned Applications | 82 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9707257
[patent_doc_number] => 08832351
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-09-09
[patent_title] => 'Virtualizing processor memory protection with “L1 iterate and L2 drop/repopulate”'
[patent_app_type] => utility
[patent_app_number] => 12/966766
[patent_app_country] => US
[patent_app_date] => 2010-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 12475
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 243
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12966766
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/966766 | Virtualizing processor memory protection with “L1 iterate and L2 drop/repopulate†| Dec 12, 2010 | Issued |
Array
(
[id] => 8242387
[patent_doc_number] => 20120151117
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-06-14
[patent_title] => 'VIRTUALIZING PROCESSOR MEMORY PROTECTION WITH \"DOMAIN TRACK\"'
[patent_app_type] => utility
[patent_app_number] => 12/966805
[patent_app_country] => US
[patent_app_date] => 2010-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 12294
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12966805
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/966805 | Virtualizing processor memory protection with “domain track†| Dec 12, 2010 | Issued |
Array
(
[id] => 8222850
[patent_doc_number] => 20120137047
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-31
[patent_title] => 'MEMORY SANITATION USING BIT-INVERTED DATA'
[patent_app_type] => utility
[patent_app_number] => 12/955579
[patent_app_country] => US
[patent_app_date] => 2010-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 7363
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12955579
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/955579 | Memory sanitation using bit-inverted data | Nov 28, 2010 | Issued |
Array
(
[id] => 5981511
[patent_doc_number] => 20110072228
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-03-24
[patent_title] => 'STORAGE CONTROLLER AND CONTROL METHOD FOR THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/954938
[patent_app_country] => US
[patent_app_date] => 2010-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 13012
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0072/20110072228.pdf
[firstpage_image] =>[orig_patent_app_number] => 12954938
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/954938 | Load equalizing storage controller and control method for the same | Nov 28, 2010 | Issued |
Array
(
[id] => 9665798
[patent_doc_number] => 08812806
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-08-19
[patent_title] => 'Method and system for non-disruptive migration'
[patent_app_type] => utility
[patent_app_number] => 12/915867
[patent_app_country] => US
[patent_app_date] => 2010-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 9530
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 251
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12915867
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/915867 | Method and system for non-disruptive migration | Oct 28, 2010 | Issued |
Array
(
[id] => 9248399
[patent_doc_number] => 08612700
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-12-17
[patent_title] => 'Method and system of performing block level duplications of cataloged backup data'
[patent_app_type] => utility
[patent_app_number] => 12/915760
[patent_app_country] => US
[patent_app_date] => 2010-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5749
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12915760
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/915760 | Method and system of performing block level duplications of cataloged backup data | Oct 28, 2010 | Issued |
Array
(
[id] => 9665804
[patent_doc_number] => 08812813
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-08-19
[patent_title] => 'Storage apparatus and data access method thereof for reducing utilized storage space'
[patent_app_type] => utility
[patent_app_number] => 12/915896
[patent_app_country] => US
[patent_app_date] => 2010-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 3577
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 193
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12915896
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/915896 | Storage apparatus and data access method thereof for reducing utilized storage space | Oct 28, 2010 | Issued |
Array
(
[id] => 7746303
[patent_doc_number] => 08108642
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-01-31
[patent_title] => 'Method and system for play-only media player'
[patent_app_type] => utility
[patent_app_number] => 12/907082
[patent_app_country] => US
[patent_app_date] => 2010-10-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2288
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/108/08108642.pdf
[firstpage_image] =>[orig_patent_app_number] => 12907082
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/907082 | Method and system for play-only media player | Oct 18, 2010 | Issued |
Array
(
[id] => 6140553
[patent_doc_number] => 20110010507
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-01-13
[patent_title] => 'HOST MEMORY INTERFACE FOR A PARALLEL PROCESSOR'
[patent_app_type] => utility
[patent_app_number] => 12/885251
[patent_app_country] => US
[patent_app_date] => 2010-09-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 4505
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0010/20110010507.pdf
[firstpage_image] =>[orig_patent_app_number] => 12885251
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/885251 | Host memory interface for a parallel processor | Sep 16, 2010 | Issued |
Array
(
[id] => 8985070
[patent_doc_number] => 08516200
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-08-20
[patent_title] => 'Avoiding cross-interrogates in a streaming data optimized L1 cache'
[patent_app_type] => utility
[patent_app_number] => 12/876366
[patent_app_country] => US
[patent_app_date] => 2010-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 5835
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12876366
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/876366 | Avoiding cross-interrogates in a streaming data optimized L1 cache | Sep 6, 2010 | Issued |
Array
(
[id] => 6100386
[patent_doc_number] => 20110004727
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-01-06
[patent_title] => 'TAPE STORAGE EMULATION FOR OPEN SYSTEMS ENVIRONMENTS'
[patent_app_type] => utility
[patent_app_number] => 12/870536
[patent_app_country] => US
[patent_app_date] => 2010-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 7363
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0004/20110004727.pdf
[firstpage_image] =>[orig_patent_app_number] => 12870536
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/870536 | Tape storage emulation for open systems environments | Aug 26, 2010 | Issued |
Array
(
[id] => 11861749
[patent_doc_number] => 09741436
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-08-22
[patent_title] => 'Dynamically controlling an operation execution time for a storage device'
[patent_app_type] => utility
[patent_app_number] => 12/833589
[patent_app_country] => US
[patent_app_date] => 2010-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 23
[patent_no_of_words] => 15556
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12833589
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/833589 | Dynamically controlling an operation execution time for a storage device | Jul 8, 2010 | Issued |
Array
(
[id] => 9143400
[patent_doc_number] => 08583882
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-11-12
[patent_title] => 'Storage subsystem and its control method'
[patent_app_type] => utility
[patent_app_number] => 12/863664
[patent_app_country] => US
[patent_app_date] => 2010-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 30
[patent_no_of_words] => 10759
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 423
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12863664
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/863664 | Storage subsystem and its control method | Jul 4, 2010 | Issued |
Array
(
[id] => 9049199
[patent_doc_number] => 08543757
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-09-24
[patent_title] => 'Techniques of maintaining logical to physical mapping information in non-volatile memory systems'
[patent_app_type] => utility
[patent_app_number] => 12/821423
[patent_app_country] => US
[patent_app_date] => 2010-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 34
[patent_no_of_words] => 12468
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 270
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12821423
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/821423 | Techniques of maintaining logical to physical mapping information in non-volatile memory systems | Jun 22, 2010 | Issued |
Array
(
[id] => 9012415
[patent_doc_number] => 08527735
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-09-03
[patent_title] => 'Data storage using virtual addressing'
[patent_app_type] => utility
[patent_app_number] => 12/819362
[patent_app_country] => US
[patent_app_date] => 2010-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 5064
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12819362
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/819362 | Data storage using virtual addressing | Jun 20, 2010 | Issued |
Array
(
[id] => 9472336
[patent_doc_number] => 08725983
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-05-13
[patent_title] => 'Memory devices and systems including multi-speed access of memory modules'
[patent_app_type] => utility
[patent_app_number] => 12/818304
[patent_app_country] => US
[patent_app_date] => 2010-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 28
[patent_no_of_words] => 10787
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 215
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12818304
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/818304 | Memory devices and systems including multi-speed access of memory modules | Jun 17, 2010 | Issued |
Array
(
[id] => 8799455
[patent_doc_number] => 08438341
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-05-07
[patent_title] => 'Common memory programming'
[patent_app_type] => utility
[patent_app_number] => 12/816588
[patent_app_country] => US
[patent_app_date] => 2010-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 6594
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12816588
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/816588 | Common memory programming | Jun 15, 2010 | Issued |
Array
(
[id] => 8923888
[patent_doc_number] => 08489837
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-07-16
[patent_title] => 'Systems and methods for handshaking with a memory module'
[patent_app_type] => utility
[patent_app_number] => 12/815339
[patent_app_country] => US
[patent_app_date] => 2010-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 7828
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12815339
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/815339 | Systems and methods for handshaking with a memory module | Jun 13, 2010 | Issued |
Array
(
[id] => 5976374
[patent_doc_number] => 20110153961
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-06-23
[patent_title] => 'STORAGE DEVICE WITH FUNCTION OF VOLTAGE ABNORMAL PROTECTION AND OPERATION METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/797604
[patent_app_country] => US
[patent_app_date] => 2010-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2281
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0153/20110153961.pdf
[firstpage_image] =>[orig_patent_app_number] => 12797604
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/797604 | STORAGE DEVICE WITH FUNCTION OF VOLTAGE ABNORMAL PROTECTION AND OPERATION METHOD THEREOF | Jun 8, 2010 | Abandoned |
Array
(
[id] => 8763198
[patent_doc_number] => 08423735
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-04-16
[patent_title] => 'Space reservation in a deduplication system'
[patent_app_type] => utility
[patent_app_number] => 12/785277
[patent_app_country] => US
[patent_app_date] => 2010-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4931
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12785277
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/785277 | Space reservation in a deduplication system | May 20, 2010 | Issued |